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US5468675A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a device separation region for semiconductor device

Assignee: Rohm Co Ltd
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Filing: 1994-05-26
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Granted: 1995-11-21
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Expires: 2014-05-26
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Abstract

Abstract Method for manufacturing a device separation region for semiconductor devices which separates regions electrically from each other stably, and allows realization of large scale integration with high reliability. When forming a device separation region 10 selectively on a substrate 1 by LOCOS method by controlling thermal oxidation, a device separation region 10 is formed to thickness t2 thinner than a predetermined thickness (FIG. 4C). A second silicon nitride layer 5 is formed onto the whole surface of the substrate 1 (FIG. 5A). A photo resist layer 8 is formed on the second silicon nitride layer 5, and the second silicon nitride layer 5 is partially removed by chemical etching (FIG. 5B). By carrying out thermal oxidation again after the etching, the device separation region 10 is formed to the predetermined thickness t (FIG. 5C). In that, device separation is accomplished stably. Also, the device formation region 15 can be formed larger than a conventional one since the occurrence of bird's beak is suppressed by controlling thermal oxidation when forming the device separation region 10. As a result, large scale integration can be realized with high reliability.

Inventors

  • 👤 Hiroyuki Kaigawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 12:54
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0128; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S438/00; Y10S438/981

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 113 words
A method for manufacturing a device separation region for semiconductor devices, comprising the steps of: forming an oxide layer on a substrate and then using a first mask, growing by thermal oxidation first portions relative to second portions of said oxide layer to a first thickness, said first portions having first surfaces and said second portions having second surfaces; altering said first surfaces to become altered first surfaces which are substantially level with said second surfaces; growing further by thermal oxidation and with use of a second mask said first portions relative to said second portions of said oxide layer to a second thickness, said second thickness being thicker than said first thickness.
Claim 2
Independent Claim 113 words
A method for manufacturing a device separation region for semiconductor devices, comprising the steps of: forming an oxide layer on a substrate and then using a first mask, growing by thermal oxidation first portions relative to second portions of said oxide layer to a first thickness, said first portions having first surfaces and said second portions having second surfaces; altering said first surfaces to become altered first surfaces which are substantially level with said second surfaces; growing further by thermal oxidation and with use of a second mask said first portions relative to said second portions of said oxide layer to a second thickness, said second thickness being thicker than said first thickness.
Claim 3
Dependent Claim 36 words
A method for manufacturing a device separation region for semiconductor devices in accordance with claim 1; wherein altering of said first surfaces of the oxide layer is carried out by dry etching in the altering step.
Claim 4
Dependent Claim 36 words
A method for manufacturing a device separation region for semiconductor devices in accordance with claim 1; wherein altering of said first surfaces of the oxide layer is carried out by mechanical etching in the altering step.
Claim 5
Dependent Claim 36 words
A method for manufacturing a device separation region for semiconductor devices in accordance with claim 1; wherein altering of said first surfaces of the oxide layer is carried out by chemical etching in the altering step.

References Cited (Backward Citations)

JPS6228446A Cited
JPS63257248A Cited
JPH02219253A Cited
JPH02312234A Cited
JPH03142856A Cited
JPH04130630A Cited
JPH04162528A Cited
JPH04321228A Cited
JPH0547775A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-11-20 1999-05-22 1999-11-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-11-20 2003-05-22 2003-11-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-11-20 2007-05-22 2007-11-21 $7700.00 Window Closed / Lapsed

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