← Back to Patent Explorer
US5466618A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating a thin film transistor for a liquid crystal display

Assignee: LG Electronics Inc
•
Filing: 1994-12-29
•
Granted: 1995-11-14
•
Expires: 2014-12-29
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for fabricating an LCD-TFT, which can prevent degradation of image quality of a liquid crystal display by preventing blackening of the pixel electrode due to H 2 plasma at the time of deposition of a protective insulation film. The method includes the steps of forming a gate electrode on a transparent glass substrate, and forming a gate insulation film, a semiconductor layer, and an impurity doped semiconductor layer successively over the surface of the substrate. The semiconductor layer and the impurity doped semiconductor layer are patterned, leaving layers only over a part of the gate insulation film over the gate electrode. A pixel electrode is formed on a part of the gate insulation film offset from the gate electrode. A metal barrier layer and source/drain electrodes are over the surface of the substrate. The metal barrier layer and the source/drain electrodes are patterned so as to expose the impurity doped semiconductor layer over the gate electrode and to cover all the surface of the pixel electrode. The semiconductor layer under the impurity doped semiconductor layer is exposed by carrying out a selective etching of the exposed impurity doped semiconductor layer with the metal barrier layer and the source/drain electrodes used as masks. A protective insulation layer is formed over the surface of the substrate, and the pixel electrode is exposed by selectively removing the protective insulation layer, the metal barrier layer and the source/drain electrodes over the pixel electrode.

Inventors

  • 👤 Jin H. Kim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 10:39
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/03

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 213 words
A method for fabricating a thin film transistor for a liquid crystal display, comprising: forming a gate electrode on a transparent glass substrate; forming a gate insulation film over the glass substrate; forming a first semiconductor layer over the gate insulation film; forming an impurity doped second semiconductor layer over the surface of the first semiconductor layer; patterning the semiconductor layers so that the semiconductor layer and the impurity doped semiconductor layer are left on a part of the gate insulation film over the gate electrode; forming a pixel electrode on a part of the gate insulation film offset from the gate electrode; forming a metal barrier layer and source/drain electrodes over the surface of the glass substrate; patterning the metal barrier layer and the source/drain electrodes to expose the impurity doped semiconductor layer over the gate electrode while covering the surface of the pixel electrode; exposing the semiconductor layer under the impurity doped semiconductor layer by selectively etching the exposed impurity doped semiconductor layer with the metal barrier layer and the source/drain electrodes used as masks; forming a protective insulation layer over the whole surface of the substrate; and, exposing the pixel electrode by selectively removing the protective insulation layer, the metal barrier layer and the source/drain electrodes over the pixel electrode.
Claim 2
Independent Claim 213 words
A method for fabricating a thin film transistor for a liquid crystal display, comprising: forming a gate electrode on a transparent glass substrate; forming a gate insulation film over the glass substrate; forming a first semiconductor layer over the gate insulation film; forming an impurity doped second semiconductor layer over the surface of the first semiconductor layer; patterning the semiconductor layers so that the semiconductor layer and the impurity doped semiconductor layer are left on a part of the gate insulation film over the gate electrode; forming a pixel electrode on a part of the gate insulation film offset from the gate electrode; forming a metal barrier layer and source/drain electrodes over the surface of the glass substrate; patterning the metal barrier layer and the source/drain electrodes to expose the impurity doped semiconductor layer over the gate electrode while covering the surface of the pixel electrode; exposing the semiconductor layer under the impurity doped semiconductor layer by selectively etching the exposed impurity doped semiconductor layer with the metal barrier layer and the source/drain electrodes used as masks; forming a protective insulation layer over the whole surface of the substrate; and, exposing the pixel electrode by selectively removing the protective insulation layer, the metal barrier layer and the source/drain electrodes over the pixel electrode.

References Cited (Backward Citations)

US4646424A Cited
US5210045A Cited
US5032531A Cited
US5094978A Cited
JPH03271720A Cited
US5407845A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-11-13 1999-05-15 1999-11-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-11-13 2003-05-15 2003-11-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-11-13 2007-05-15 2007-11-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag