Neutral-point clamped inverter device using semiconductor modules

Claim 2

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number to the number of phases of the inverter device; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, each of said arms comprising two parallel circuits connected in series, each parallel circuit including a switching device and a diode opposite in polarity to said switching device; and a plurality of diodes each connected between said intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein each of said arms is formed by a single module, each said single module including: a metal substrate, a plurality of insulation plates disposed on said metal substrate; a plurality of electrode plates disposed on each of said insulation plates; a switching device chip and a diode chip disposed on at least one of said electrode plates on each of said insulation plates; and a plurality of terminals disposed on said electrode plates, and wherein a lifetime control is applied to said switching devices located close to said d.c. terminals so that lifetimes of said switching devices located close to said d.c. terminals are shorter than lifetimes of said switching devices located close to said a.c. terminals to decrease switching losses and decrease switching times of said switching devices located close to said d.c. terminals; wherein said lifetime control comprises irradiating said switching devices located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 3

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number to the number of phases of the inverter device; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, each of said arms comprising two parallel circuits connected in series, each parallel circuit including an insulated gate bipolar transistor and a diode opposite in polarity to said insulated gate bipolar transistor; and a plurality of diodes each connected between said intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein each of said arms is formed by a single module, each said module including: a metal substrate; a plurality of insulation plates disposed on said metal substrate; a plurality of electrode plates disposed on each of said insulation plates; an insulated gate bipolar transistor chip and a diode chip disposed on at least one of said electrode plates on each of said insulation plates; and a plurality of terminals disposed on said electrode plates, and wherein a lifetime control is applied to said insulated gate bipolar transistors located close to said d.c. terminals so that lifetimes of said insulated gate bipolar transistors located close to said d.c terminals are shorter than lifetimes of said insulated gate bipolar transistors located close to said a.c. terminals to decrease switching losses and decrease switching times of said insulated gate bipolar transistors located close to said a.c. terminals; wherein said lifetime control comprises irradiating said insulated gate bipolar transistors located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 4

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number to the number of phases of the inverter device; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, each of said arms comprising two parallel circuits connected in series, each parallel circuit including an insulated gate bipolar transistor and a diode opposite in polarity to said insulated gate bipolar transistor; and a plurality of diodes each connected between said intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein each of said arms is formed by a single module, each said module including: a metal substrate; a plurality of insulation plates disposed on said metal substrate; a plurality of electrode plates disposed on each of said insulation plates; an insulated gate bipolar transistor chip and a diode chip disposed on at least one of said electrode plates on each of said insulation plates; and a plurality of terminals disposed on said electrode plates, and wherein a lifetime control is applied to said insulated gate bipolar transistors located close to said d.c. terminals so that lifetimes of said insulated gate bipolar transistors located close to said d.c terminals are shorter than lifetimes of said insulated gate bipolar transistors located close to said a.c. terminals to decrease switching losses and decrease switching times of said insulated gate bipolar transistors located close to said a.c. terminals; wherein said lifetime control comprises irradiating said insulated gate bipolar transistors located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 5

An inverter device comprising: first d.c. terminals connected to a high potential point of a d.c. power source circuit; second d.c. terminals connected to a low potential point of the d.c. power source circuit; third d.c. terminals connected to an intermediate potential node having a potential intermediate between the high potential point and the low potential point of the d.c. power source circuit; a.c. terminals equal in number to the number of phases of the a.c. output; a plurality of single inverters, equal in number to the number of phases of the a.c. output, connected in parallel between said first d.c. terminals and said second d.c. terminals, wherein each of the single inverters includes an intermediate point connected to one of said a.c. terminals, wherein each of said single inverters includes: first, second, third and fourth insulated gate bipolar transistors connected in series; first, second, third and fourth diodes respectively connected in parallel with each of said insulated gate bipolar transistors in opposite polarity to said insulated gate bipolar transistors; a fifth diode connected to an intermediate node of said first and second insulated gate bipolar transistors and to one of third d.c. terminals, and a sixth diode connected to an intermediate node of said third and fourth insulated gate bipolar transistors and to said one of said third d.c. terminals, and wherein in each of said single inverters said first and second insulated gate bipolar transistors and said first and second diodes comprise a first single module, and said third and fourth insulated gate bipolar transistors and said third and fourth diodes comprise a second single module, which each of said first and second single modules comprises: a metal substrate; a plurality of insulation plates disposed on the metal substrate; a plurality of electrode plates disposed on each of the insulation plates, and a plurality of terminals disposed on each of the electrode plates, wherein the first and second insulated gate bipolar transistors and first and second diode chips forming said first and second diodes are disposed on at least one of the electrode plates on an insulation plate of said first single module, and wherein the third and fourth insulated gate bipolar transistors and third and fourth diode chips forming said third and fourth diodes are disposed on at least one of the electrode plates on an insulation plate of said second single module, and wherein a lifetime control is applied to said first and fourth insulated gate bipolar transistors so that lifetimes of said first and fourth insulated gate bipolar transistors are shorter than lifetimes of said second and third insulated gate bipolar transistors to decrease switching losses and decrease switching times of the first and fourth insulated gate bipolar transistors; wherein said lifetime control comprises irradiating said first and fourth insulated gate bipolar transistors located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 6

An inverter device comprising: first d.c. terminals connected to a high potential point of a d.c. power source circuit; second d.c. terminals connected to a low potential point of the d.c. power source circuit; third d.c. terminals connected to an intermediate potential node having a potential intermediate between the high potential point and the low potential point of the d.c. power source circuit; a.c. terminals equal in number to the number of phases of the a.c. output; a plurality of single inverters, equal in number to the number of phases of the a.c. output, connected in parallel between said first d.c. terminals and said second d.c. terminals, wherein each of the single inverters includes an intermediate point connected to one of said a.c. terminals, wherein each of said single inverters includes: first, second, third and fourth insulated gate bipolar transistors connected in series; first, second, third and fourth diodes respectively connected in parallel with each of said insulated gate bipolar transistors in opposite polarity to said insulated gate bipolar transistors; a fifth diode connected to an intermediate node of said first and second insulated gate bipolar transistors and to one of third d.c. terminals, and a sixth diode connected to an intermediate node of said third and fourth insulated gate bipolar transistors and to said one of said third d.c. terminals, and wherein in each of said single inverters said first and second insulated gate bipolar transistors and said first and second diodes comprise a first single module, and said third and fourth insulated gate bipolar transistors and said third and fourth diodes comprise a second single module, which each of said first and second single modules comprises: a metal substrate; a plurality of insulation plates disposed on the metal substrate; a plurality of electrode plates disposed on each of the insulation plates, and a plurality of terminals disposed on each of the electrode plates, wherein the first and second insulated gate bipolar transistors and first and second diode chips forming said first and second diodes are disposed on at least one of the electrode plates on an insulation plate of said first single module, and wherein the third and fourth insulated gate bipolar transistors and third and fourth diode chips forming said third and fourth diodes are disposed on at least one of the electrode plates on an insulation plate of said second single module, and wherein a lifetime control is applied to said first and fourth insulated gate bipolar transistors so that lifetimes of said first and fourth insulated gate bipolar transistors are shorter than lifetimes of said second and third insulated gate bipolar transistors to decrease switching losses and decrease switching times of the first and fourth insulated gate bipolar transistors; wherein said lifetime control comprises irradiating said first and fourth insulated gate bipolar transistors located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 7

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number to the number of phases of the inverter device; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, comprising two parallel circuits connected in series, each parallel circuit including a switching device and a diode opposite in polarity to said switching device; and a plurality of diodes each connected between said intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein a lifetime control is applied to said switching devices located close to said d.c. terminals so that lifetimes of said switching devices located close to said d.c. terminals are shorter than lifetimes of said switching devices located close to said a.c. terminals to decrease switching losses and decrease switching times of said switching devices located close to said d.c. terminals; wherein said lifetime control comprises irradiating said switching devices located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 8

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number to the number of phases of the inverter device; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, comprising two parallel circuits connected in series, each parallel circuit including a switching device and a diode opposite in polarity to said switching device; and a plurality of diodes each connected between said intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein a lifetime control is applied to said switching devices located close to said d.c. terminals so that lifetimes of said switching devices located close to said d.c. terminals are shorter than lifetimes of said switching devices located close to said a.c. terminals to decrease switching losses and decrease switching times of said switching devices located close to said d.c. terminals; wherein said lifetime control comprises irradiating said switching devices located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 9

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number of the number of phases; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, comprising two parallel circuits connected in series, each parallel circuit including a switching device and a diode opposite in polarity to said switching device; and a plurality of diodes each connected between the intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein a lifetime control is applied to said diodes of said parallel circuits located close to said d.c. terminals so that lifetimes of said diodes of said parallel circuits located close to said d.c. terminals are shorter than lifetimes of said diodes of said parallel circuits located close to said a.c. terminals to decrease switching losses and decrease switching times of said diodes of said parallel circuits located close to said d.c. terminals; wherein said lifetime control comprises irradiating said diodes located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.

Claim 10

An inverter device comprising: a pair of d.c. terminals; an intermediate node at a potential intermediate between the potentials of said pair of d.c. terminals; a.c. terminals equal in number of the number of phases; a plurality of arms each connected between one of said d.c. terminals and one of said a.c. terminals, comprising two parallel circuits connected in series, each parallel circuit including a switching device and a diode opposite in polarity to said switching device; and a plurality of diodes each connected between the intermediate node and a node between the parallel circuits of a corresponding one of the arms, wherein a lifetime control is applied to said diodes of said parallel circuits located close to said d.c. terminals so that lifetimes of said diodes of said parallel circuits located close to said d.c. terminals are shorter than lifetimes of said diodes of said parallel circuits located close to said a.c. terminals to decrease switching losses and decrease switching times of said diodes of said parallel circuits located close to said d.c. terminals; wherein said lifetime control comprises irradiating said diodes located close to said d.c. terminals with an electron beam to provide said shorter lifetimes.