Image processing apparatus

Abstract

Abstract An image processing apparatus having a solid state image sensor for inputting an optical image thereto and converting the image into an electrical signal; an image memory having a general-purpose DRAM formed by at least one chip and required to control the refresh operation from the outside of the memory chip; a timing signal generator for generating timing of read from the solid state image sensor; a transfer/storage control device for horizontally reading data from the solid state image sensor synchronously with the horizontal read timing signal generated from the timing signal generator, transferring the read data and storing the data in the DRAM; a first refresh signal generator for refreshing the DRAM at predetermined time intervals when no data is read from the solid state image sensor; and a second refresh signal generator for refreshing the DRAM a predetermined number of times during the dormant period of the horizontal read timing signal. In the apparatus, the second refresh signal generator is made effective synchronously with the horizontal read timing signal during the time of read from the solid state image sensor, and the first refresh signal generator is made effective during a time other than the time of read from the solid state image sensor.

Inventors

• 👤 Nobuo Fukushima

Bibliographic Details