US5459349A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with reduced noise propagation between circuit blocks
Assignee: Renesas Electronics Corp
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Filing: 1994-05-03
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Granted: 1995-10-17
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Expires: 2014-05-03
Abstract
Abstract A twin-well semiconductor device comprises a P-substrate having an inherent region including a separating zone and two pairs of an N-well and a P-well in the vicinity of the main surface of the P-substrate. An analog and a digital circuit block are formed on each one of the pairs of the N-well and the P-well. In the P-well of the analog circuit, a P+ diffused layer is formed between the boundary of the P-well and the analog circuit block, and is maintained at a ground potential. The P-type separating region is provided therein with an N-well in which an N+ diffused layer connected to Vdd line is formed. Due to the high equivalent resistance of the undoped separating zone of the semiconductor substrate separating the circuit blocks and the small junction capacitances formed between the separating zone and the N-well, noise propagating from the digital circuit block to the analog circuit block can be reduced.
Inventors
- 👤 Hiroyuki Kobatake
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 12:56
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10D89/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
189 words
A semiconductor device comprising: a semiconductor substrate of a first conductive type defining an inherent region of said semiconductor substrate having a first impurity concentration and at least two pairs of wells, each pair of wells including a first well of the first conductive type and a second well of a second conductive type disposed adjacent to each other in the vicinity of a main surface of said semiconductor substrate, each of said first and second of said pairs of wells having an impurity concentration higher than the first impurity concentration, said inherent region including a separating zone separating two of said first well; and at least two circuit blocks each having a circuit area within corresponding one of said pairs of said first well and said second well, one of said first wells including between the boundary of said first well and the circuit area of a corresponding one of said circuit blocks a first doped region of the first conductive type having an impurity concentration higher than the impurity concentration of said one of said first wells, said first doped region being maintained at a first potential.
Claim 2
Dependent Claim
189 words
A semiconductor device comprising: a semiconductor substrate of a first conductive type defining an inherent region of said semiconductor substrate having a first impurity concentration and at least two pairs of wells, each pair of wells including a first well of the first conductive type and a second well of a second conductive type disposed adjacent to each other in the vicinity of a main surface of said semiconductor substrate, each of said first and second of said pairs of wells having an impurity concentration higher than the first impurity concentration, said inherent region including a separating zone separating two of said first well; and at least two circuit blocks each having a circuit area within corresponding one of said pairs of said first well and said second well, one of said first wells including between the boundary of said first well and the circuit area of a corresponding one of said circuit blocks a first doped region of the first conductive type having an impurity concentration higher than the impurity concentration of said one of said first wells, said first doped region being maintained at a first potential.
Claim 3
Dependent Claim
50 words
A semiconductor device according to claim 1 further comprising a first source line and a second source line both maintained at said first potential, said first source line supplying power for corresponding one of said circuit blocks, said second source line maintaining said first doped region at said first potential.
Claim 4
Dependent Claim
79 words
A semiconductor device according to claim 1 further comprising: a third well of the second conductive type disposed in said separating zone and having an impurity concentration higher than said first impurity concentration; and a second doped region of the second conductive type having an impurity concentration higher than said impurity concentration of said third well, said third well having no functional circuit block formed within said third well, said second doped region being maintained at a second potential.
Claim 5
Dependent Claim
21 words
A semiconductor device according to claim 1 wherein the width of said separating zone is not less than about 4 μm.
Claim 6
Dependent Claim
21 words
A semiconductor device according to claim 1 wherein said circuit blocks include a digital circuit block and an analog circuit block.
Claim 7
Dependent Claim
17 words
A semiconductor device according to claim 1 wherein both of said circuit blocks are analog circuit blocks.
Claim 8
Dependent Claim
25 words
A semiconductor device according to claim 1 wherein said first conductive type is a P-conductive type and said second conductive type is an N-conductive type.
References Cited (Backward Citations)
JPS6212147A
Cited
JPH01112765A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-10-16 | 1999-04-17 | 1999-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-10-16 | 2003-04-17 | 2003-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-10-16 | 2007-04-17 | 2007-10-17 | $7700.00 | Window Closed / Lapsed |