Electronic component with a shift register test architecture (boundary scan)

Claim 1

An electronic circuit component with a component core and a shift register test architecture, comprising: a plurality of test cells, each of said test cells being formed of a plurality of register cells mutually connected in series and controllable with control signals; switch means connected to said register cells for selectively inputting into said register cells data from a core of the electronic circuit component or from a respectively adjacent test cell; a further register cell connected between said switch means and said plurality of register cells; a further switch connected to said further register cell; said further switch being switchable with one of the control signals, and said further register cell selectively receiving data from the component core or from a mutually adjacent register cell, or the manufacturer datum; and said further switch determining a binary state of the manufacturer datum by connecting with a given supply voltage of the electronic circuit component.