Method of forming a step compensated semiconductor device

Claim 1

A method of manufacturing a semiconductor device comprising the steps of: (a) forming an insulating film on a surface of a semiconductor substrate; (b) forming openings in said insulating film at contact areas of second regions adjacent to a first region on the surface of said semiconductor substrate to expose said contact areas of said second regions; (c) depositing a conductive layer over the semiconductor substrate and forming from said conductive layer a first conductive film on said insulating film at said first region, and second conductive films on the surface of said semiconductor substrate at said exposed contact areas of said second regions; (d) following the step (c), providing an interlayer insulating film having a fiat surface and covering said first and second conductive films and said insulating film, said interlayer insulating film having a thickness above said first conductive film and having the same thickness above said second conductive film; and (e) forming first and second contact holes having substantially identical depths down to said first and second conductive films through said interlayer insulating film.

Claim 2

A method of manufacturing a semiconductor device comprising the steps of: (a) forming an insulating film on a surface of a semiconductor substrate; (b) forming openings in said insulating film at contact areas of second regions adjacent to a first region on the surface of said semiconductor substrate to expose said contact areas of said second regions; (c) depositing a conductive layer over the semiconductor substrate and forming from said conductive layer a first conductive film on said insulating film at said first region, and second conductive films on the surface of said semiconductor substrate at said exposed contact areas of said second regions; (d) following the step (c), providing an interlayer insulating film having a fiat surface and covering said first and second conductive films and said insulating film, said interlayer insulating film having a thickness above said first conductive film and having the same thickness above said second conductive film; and (e) forming first and second contact holes having substantially identical depths down to said first and second conductive films through said interlayer insulating film.

Claim 8

A method of manufacturing a semiconductor device comprising the steps off (a) providing a semiconductor substrate having a first area, a second area, and a third area in which a gate electrode, a source region, and a drain region are to be formed, respectively; (b) depositing a conductive layer over the semiconductor substrate and forming the gate electrode in the first area on the substrate from said conductive layer, and simultaneously forming offset layers on the second and the third areas on the substrate from said conductive layer, wherein levels of top surfaces of the gate electrode and the offset layers are flush; (c) forming the source and drain regions in the second and third areas in the semiconductor substrate, respectively; (d) forming an interlayer insulating film having a corrugated surface; (e) flattening the corrugated surface of the interlayer insulating film to provide a flat interlayer insulating film having equal thicknesses at positions above the gate electrode and the offset layers, respectively; and (f) forming contact holes of equal depth in the flat interlayer insulating film, extending down to the gate electrode and the offset layers, respectively.

Claim 9

A method of manufacturing a semiconductor device comprising the steps off (a) providing a semiconductor substrate having a first area, a second area, and a third area in which a gate electrode, a source region, and a drain region are to be formed, respectively; (b) depositing a conductive layer over the semiconductor substrate and forming the gate electrode in the first area on the substrate from said conductive layer, and simultaneously forming offset layers on the second and the third areas on the substrate from said conductive layer, wherein levels of top surfaces of the gate electrode and the offset layers are flush; (c) forming the source and drain regions in the second and third areas in the semiconductor substrate, respectively; (d) forming an interlayer insulating film having a corrugated surface; (e) flattening the corrugated surface of the interlayer insulating film to provide a flat interlayer insulating film having equal thicknesses at positions above the gate electrode and the offset layers, respectively; and (f) forming contact holes of equal depth in the flat interlayer insulating film, extending down to the gate electrode and the offset layers, respectively.

Claim 15

A method of manufacturing a semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a first area for a gate electrode and a contact area; (b) depositing a conductive layer over the semiconductor substrate and forming the gate electrode in the first area on the substrate from the conductive layer, and simultaneously forming an offset layer on the contact area on the substrate from the conductive layer so that the top surfaces of the gate electrode and the offset layer are flush; (c) forming an interlayer insulating film having a corrugated surface; (d) flattening the corrugated surface of the interlayer insulating film to provide a flat interlayer insulating film having equal thicknesses at positions above the gate electrode and the offset layer, respectively; and (e) forming contact holes having identical depths in the flat interlayer insulating film down to the gate electrode and the offset layer.

Claim 16

A method of manufacturing a semiconductor device comprising the steps of: (a) providing a semiconductor substrate having a first area for a gate electrode and a contact area; (b) depositing a conductive layer over the semiconductor substrate and forming the gate electrode in the first area on the substrate from the conductive layer, and simultaneously forming an offset layer on the contact area on the substrate from the conductive layer so that the top surfaces of the gate electrode and the offset layer are flush; (c) forming an interlayer insulating film having a corrugated surface; (d) flattening the corrugated surface of the interlayer insulating film to provide a flat interlayer insulating film having equal thicknesses at positions above the gate electrode and the offset layer, respectively; and (e) forming contact holes having identical depths in the flat interlayer insulating film down to the gate electrode and the offset layer.