Device and method for precoding

Claim 3

The device of claim 1 wherein the means for generating x(D) of the precoding unit comprises at least: first combining means, operably coupled to the mapping means and to a slicing means, for combining u(D) and the code sequence c(D) to provide a combiner output sequence s(D), wherein the slicing means is operably, coupled to a filtering means, and is utilized for slicing the post-cursor sequence p(D) to a selected code sequence of said signal points c(D) selected from the trellis code C, and wherein the filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D) from the signal s(D) outputted from the first combining means.

Claim 4

The device of claim 2 wherein the first combining means is a summer.

Claim 5

The device of claim 2 wherein the first combining means is selected to be operably coupled to the mapping means and to the slicing means further including an inverse filtering means, operably coupled to receive s(D) from the first combining means and to provide s(D)/h(D) to the filtering means, is further included for providing a transmission sequence x(D) substantially of a form s(D)/h(D).

Claim 6

The device of claim 2 wherein the precoding unit further includes second combining means, operably coupled to the first combining means and to the filtering means, for providing the transmitted sequence x(D) substantially of a form x(D)=s(D)-p(D).

Claim 7

The device of claim 5 wherein the second combining means is a summer.

Claim 8

The device of claim 2 wherein the mapping unit includes constellation shaping.

Claim 9

The device of claim 2 wherein the precoding unit further includes an interleaving means for interleaving to facilitate a removal of potential correlation between successive noise samples at the output of the channel.

Claim 10

The device of claim 2, wherein the precoding unit further includes second combining means, operably coupled to the first combining means and to the filtering means, for providing the transmitted sequence x(D) substantially of a form x(D)=s(D)-p(D).

Claim 11

The device of claim 2 wherein the first combining means is selected to be operably coupled to the mapping means and to the slicing means further including an inverse filtering means, operably coupled to receive said s(D) from the first combining means where the first combining means also provides said s(D) to the filtering means in a feedback loop wherein the filtering means provides said p(D) to the slicing means which provides said c(D) to the first combining means, and the inverse filtering means is further included for providing a transmission sequence x(D) substantially of a form s(D)/h(D).

Claim 12

The device of claim 1 wherein the means for generating x(D) of the precoding unit comprises at least: first combining means, operably coupled to the mapping means, to a slicing means, and to a filtering means, for combining said u(D), the code sequence c(D) and the postcursor ISI sequence p(D) to provide the transmission sequence x(D), wherein the slicing means is operably coupled to the filtering means, and is utilized for slicing the post-cursor ISI sequence p(D) to a selected code sequence of said signal points c(D) selected from the trellis code C, and wherein the filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D) from the transmission sequence x(D).

Claim 13

The device of claim 11 wherein the first combining means is a summer.

Claim 14

The device of claim 1 wherein the precoding unit comprises at least: mapping means, for mapping the digital data sequence into said signal point sequence u(D) selected from a translate of a trellis code C, first combining means, operably coupled to the mapping means and to a slicing means, for combining said u(D) with at least the code sequence c(D) from the slicing means to provide a combiner output sequence s(D), an inverse filtering means, operably coupled to the first combining means, for providing a transmission sequence substantially of a form x(D) =s(D)/h(D) to a filtering means, and the filtering means, operably coupled to the inverse filtering means, for extracting the post-cursor ISI sequence p(D) from the transmission sequence x(D), wherein the slicing means is operably coupled to the filtering means, and is utilized for slicing the post-cursor sequence p(D) to said code sequence c(D) selected from the trellis code C.

Claim 15

The device of claim 13 wherein the first combining means is a summer.

Claim 16

The device of claim 1 wherein the precoding unit comprises at least: mapping means, for mapping the digital data sequence into a signal point sequence u(D) selected from a translate of a trellis code C, first combining means, operably coupled to the mapping means and to a slicing means, for combining u(D) with at least the code sequence c(D) from the slicing means to provide a combiner output sequence s(D), and an inverse filtering means, operably coupled to receive said s(D) from the first combining means where the first combining means also provides said s(D)to a filtering means in a feedback loop wherein said filtering means provides p(D) to the slicing means which provides c(D) to the first combining means, and the inverse filtering means is utilized for providing a transmission sequence substantially of a form x(D)=s(D)/h(D), wherein the slicing means is operably coupled to the filtering means, and is utilized for slicing the post-cursor sequence p(D) to a selected code sequence of signal points c(D) selected from the trellis code C, and wherein the filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D) from the combiner output sequence s(D).

Claim 17

The device of claim 15 wherein the first combining means is a summer.

Claim 18

The device of claim 1 wherein the trellis code C may be represented by a trellis diagram having only one state.

Claim 19

The device of claim 1 wherein the trellis code C is a block code.

Claim 20

The device of claim 1 wherein said u(D)is an arbitrary complex sequence from a translate of an n-dimensional trellis code C based on a partition Λ/Λ' (i.e., a partition of a lattice Λ into its sublattice Λ'), where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis.

Claim 21

The device of claim 1 wherein the trellis code C is based on a two-dimensional lattice partition Λ/Λ', and the sequence c(D) is selected from said trellis code C with a zero delay and the selection is dependent from symbol to symbol.

Claim 22

The device of claim 20 wherein selection of the sequence c(D) is forced to a known state of the trellis code C at every Lth symbol, where L is a preselected integer.

Claim 23

The device of claim 20 wherein said trellis code C is a four-dimensional trellis code based on a partition Z 4 /RD 4 , wherein a sublattice is RD 4 , and the slicing means provides the selected sequence c(D) from RD 4 by selecting a symbol c k from RZ 2 in a first symbol interval, a second symbol c k+1 from either 2Z 2 or its coset 2Z 2 +(1,0), based on c k , where k is an even integer.

Claim 24

The device of claim 1 wherein, the sequence c(D) is preselected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k.

Claim 25

The device of claim 23 wherein, the preselection of c k further includes constraints to limit a range of symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D).

Claim 26

A digital communications receiver for receiving a digital data sequence that was mapped into a signal point sequence x(D) and transmitted over a channel characterized by a nonideal response h(D) using a trellis code C, providing a received sequence r(D), comprising at least: decoding means, operably coupled to receive said r(D), for decoding the received transmission sequence r(D) to provide an estimated output sequence y(D), and recovery means, operably coupled to the decoding means, for substantially recovering an estimated sequence u(D) for a sequence u(D) for a transmitted said signal point sequence x(D), selected from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D) is selected based only upon p(D).

Claim 27

A digital communications receiver for receiving a digital data sequence that was mapped into a signal point sequence x(D) and transmitted over a channel characterized by a nonideal response h(D) using a trellis code C, providing a received sequence r(D), comprising at least: decoding means, operably coupled to receive said r(D), for decoding the received transmission sequence r(D) to provide an estimated output sequence y(D), and recovery means, operably coupled to the decoding means, for substantially recovering an estimated sequence u(D) for a sequence u(D) for a transmitted said signal point sequence x(D), selected from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D) is selected based only upon p(D).

Claim 28

The digital communications receiver of claim 25 wherein the recovery means includes at least: recovery filtering means, operably coupled to receive the estimated output sequence y(D), for providing an estimated post-cursor intersymbol interference (ISI) sequence p(D), recovery slicing means, operably coupled to the recovery filtering means, for providing an estimated nonzero code sequence c(D) from said trellis code C that substantially correlates with said c(D) utilized for providing the transmission sequence x(D), first combining means, operably coupled to receive the estimated output sequence y(D) and to the recovery slicing means, for determining the estimated sequence u(D), substantially of a form u(D)=y(D)-c(D), and an inverse mapping means, operably coupled to the first combining means, for inverse mapping the estimated sequence u(D) to provide a recovered digital data sequence.

Claim 29

The digital communications receiver of claim 25 further including, where the signal point sequence u(D) was interleaved before transmission: first deinterleaving means, operably coupled to receive said r(D), for providing a deinterleaved r(D) sequence to the decoding means, an interleaving means, operably coupled to the decoding means, for providing an interleaved estimate of the decoded sequence, y'(D), to the recovery means, and wherein the recovery means further includes second deinterleaving means.

Claim 30

The digital communications receiver of claim 25 wherein one of: A) said u(D) is an arbitrary complex sequence from a translate of said trellis code C having n dimensions based on a partition Λ/Λ' where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis, B) said trellis code C is based on a two-dimensional lattice partition Λ/Λ', and the sequence c(D) is selected from said trellis code C with a zero delay and is dependent from symbol to symbol, and one of: 1) selection of the sequence c(D) is forced to a known state of said trellis code C at every Lth symbol, where L is a preselected integer, and 2) selection of the sequence c(D) is unforced with respect to every Lth symbol, C) said trellis code C is a four-dimensional trellis code based on a partition Z 4 /RD 4 , wherein the sublattice is RD 4 , and the slicing means provides the selected sequence c(D) from RD 4 by selecting a symbol c k from RZ 2 in a first symbol interval, a second symbol c k+1 from either 2Z 2 or its coset 2Z 2 +(1,0), based on c k , where k is an even integer, and D) the sequence c(D) is selected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k and one of: 1) the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D), and 2) the selection of c k is unrestrained with respect to a range of the symbols y k .

Claim 31

The digital communications receiver of claim 25 wherein the nonideal response h(D) represents the impulse response of a noise prediction filter.

Claim 32

The digital communications receiver of claim 25 wherein, the sequence c(D) is selected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k.

Claim 33

The digital communications receiver of claim 30 wherein, the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D).

Claim 34

The digital communications receiver of claim 25, wherein the decoding means further includes a reduced complexity sequence estimator means that utilizes a correlation between successive symbols y k in time interval k of a channel output sequence y(D).

Claim 35

The digital communications receiver of claim 32 wherein the reduced complexity sequence estimator means utilizes a sequence estimator having a reduced number of states that are determined utilizing state merging techniques for reduced-state sequence estimation (RSSE).

Claim 36

The digital communications receiver of claim 25, wherein the recovery means further includes a range violation determiner for, where a kth variable u k of the recovered sequence u(D) is outside a range R (a range violation), adjusting one of an estimate y k and an estimate y k-i (where i is a positive integer) to substantially correct the range violation.

Claim 39

The method of claim 35 wherein at least one of: A) said trellis code C may be represented by a trellis diagram having only one state, B) said trellis code C is a block code, C) said u(D) is an arbitrary complex sequence from a translate of said trellis code C having n dimensions based on a partition Λ/Λ' where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis, D) said trellis code C is based on a two-dimensional lattice partition Λ/Λ', and the sequence c(D) is selected from said trellis code C with a zero delay and is dependent from symbol to symbol, and one of 1) selection of the sequence c(D) is forced to a known state of said trellis code C at every Lth symbol, where L is a preselected integer, and 2) selection of the sequence c(D) is unforced with respect to every Lth symbol, E) said trellis code C is a four-dimensional trellis code based on a partition Z 4 /RD 4 , wherein the sublattice is RD 4 , and the slicing means provides the selected sequence c(D) form RD 4 by selecting a symbol c k from RZ 2 in a first symbol interval, a second symbol c k+1 from either 2Z 2 or its coset 2Z 2 +(1,0), based on c k , where k is an even integer, and F) the sequence c(D) is selected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k and one of: 1) the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D), and 2) the selection of c k is unrestrained with respect to a range of the symbols y k .

Claim 40

The method of claim 35 wherein, the sequence c(D) is selected such that for each time interval k, an energy |d k 51 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k.

Claim 41

The method of claim 35 wherein, the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D).

Claim 42

A digital signal processor for use in a digital communication system to precode a digital data sequence uniquely represented by an input sequence of a stream of signal points u(D) chosen from some translate of a trellis code C for transmission over a discrete-time channel with a impulse response h(D), the processor comprising: a program storage medium having a computer program to be executed by the digital signal processor, the program comprising: a precoding means, for selecting said signal point sequence x(D) from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein said u(D) is selected to uniquely represent said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D)is based upon p(D), wherein the precoding means comprises: mapping means for mapping the digital data sequence into said signal point sequence u(D) selected from a translate of said trellis code C, and means for generating said x(D), operably coupled to the mapping means, for altering signal point sequence u(D) to provide said x(D).

Claim 43

A digital signal processor for use in a digital communication system to precode a digital data sequence uniquely represented by an input sequence of a stream of signal points u(D) chosen from some translate of a trellis code C for transmission over a discrete-time channel with a impulse response h(D), the processor comprising: a program storage medium having a computer program to be executed by the digital signal processor, the program comprising: a precoding means, for selecting said signal point sequence x(D) from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein said u(D) is selected to uniquely represent said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D)is based upon p(D), wherein the precoding means comprises: mapping means for mapping the digital data sequence into said signal point sequence u(D) selected from a translate of said trellis code C, and means for generating said x(D), operably coupled to the mapping means, for altering signal point sequence u(D) to provide said x(D).

Claim 44

The digital signal processor of claim 39 wherein the precoding unit comprises at least: mapping means, for mapping the digital data sequence into a signal point sequence u(D) selected from said translate of a trellis code C, first combining means, operably coupled to the mapping means, to a slicing means, and, where selected, to a filtering means, for combining u(D) and at least the code sequence c(D) to provide a combiner output sequence s(D), wherein the slicing means is operably coupled to a filtering means, and is utilized for slicing the post-cursor sequence p(D) to a selected code sequence of signal points c(D) selected from the trellis code C, and wherein said filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D).

Claim 45

The digital signal processor of claim 39 wherein at least one of: A) said trellis code C may be represented by a trellis diagram having only one state, B) said trellis code C is a block code, C) said u(D) is an arbitrary complex sequence from a translate of said trellis code C having n dimensions based on a partition Λ/Λ' where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis, D) said trellis code C is based on a two-dimensional lattice partition Λ/Λ', and the sequence c(D) is selected from said trellis code C with a zero delay and is dependent from symbol to symbol, and one of: 1) selection of the sequence c(D) is forced to a known state of the trellis code C at every Lth symbol, where L is a preselected integer, and 2) selection of the sequence c(D) is unforced with respect to every Lth symbol, E) said trellis code C is a four-dimensional trellis code based on a partition Z 4 /RD 4 , wherein the sublattice is RD 4 , and the slicing means provides the selected sequence c(D) from RD 4 by selecting a symbol c k from RZ 2 in a first symbol interval, a second symbol c k+1 from either 2Z 2 or its coset 2Z 2 +(1,0), based on c k , where k is an even integer, and F) the sequence c(D) is selected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k and one of: 1) the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D), and 2) the selection of c k is unrestrained with respect to a range of the symbols y k .

Claim 46

The digital signal processor of claim 39 wherein the sequence c(D) is selected such that for each time interval k, an energy |d k | 2 of dither symbols d k of a dither sequence d(D) is minimized, where, for d k =c k -p k where c k is a symbol from the sequence c(D) in time interval k and p k is a symbol from the sequence p(D) in the time interval k.

Claim 47

The digital signal processor of claim 39 wherein the selection of c k further includes constraints to limit a range of the symbols y k in time interval k of a channel output sequence y(D) where y(D)=x(D)h(D).

Claim 48

A digital communication system for at least mapping a digital data sequence into a signal point sequence x(D) for transmission over a channel characterized by a nonideal response h(D) using a trellis code C, comprising at least one of: a transmission unit having: A) a precoding unit for selecting said signal point sequence x(D) from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D)is selected based only upon p(D), wherein the precoding unit comprises: mapping means, operably coupled to a means for generating said x(D) from said signal point sequence u(D), for mapping the digital data sequence into a signal point sequence u(D) selected from said translate of a trellis code C, and means for generating and transmitting x(D), operably coupled to the mapping means, for altering signal point sequence u(D to provide x(D), B) channel means, operably coupled to the precoding means, for facilitating transmission of the transmission sequence x(D), and a receiving unit having: C) decoding means, operably coupled to the channel means, for receiving and decoding a received transmission sequence r(D) to provide an estimated output sequence y(D); and D) recovery means, operably coupled to the decoding means, for substantially recovering an estimated sequence u(D) for said sequence u(D) for a transmitted signal point sequence x(D), selected from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D) is selected based only upon p(D), wherein the precoding unit further comprises: first combining means, operably coupled to the mapping means, and to a slicing means, for combining u(D) and at least the code sequence c(D) to provide a combiner output sequence s(D), wherein the slicing means is operably coupled to the filtering means, and is utilized for slicing the post-cursor sequence p(D) to a selected code sequence of signal points c(D) selected from the trellis code C, and a filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D), wherein u(D) is an arbitrary complex sequence from a translate of an n-dimensional trellis code C based on a partition Λ/Λ' (i.e., a partition of a lattice Λ into its sublattice Λ' ) where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis, and where interleaving is preselected, the precoding unit further includes an interleaving means for providing an interleaved coded sequence, x'(D), to the channel means, and said system further including: first deinterleaving means, operably coupled to receive r(D), for providing a deinterleaved r(D) sequence to the decoding means, an interleaving means, operably coupled to the decoding means, for providing an interleaved estimate of the decoded sequence, y'(D), to the recovery means, and wherein the recovery means further includes second deinterleaving means for deinterleaving the interleaved estimate of the decoded sequence, y'(D).

Claim 49

A digital communication system for at least mapping a digital data sequence into a signal point sequence x(D) for transmission over a channel characterized by a nonideal response h(D) using a trellis code C, comprising at least one of: a transmission unit having: A) a precoding unit for selecting said signal point sequence x(D) from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D)is selected based only upon p(D), wherein the precoding unit comprises: mapping means, operably coupled to a means for generating said x(D) from said signal point sequence u(D), for mapping the digital data sequence into a signal point sequence u(D) selected from said translate of a trellis code C, and means for generating and transmitting x(D), operably coupled to the mapping means, for altering signal point sequence u(D to provide x(D), B) channel means, operably coupled to the precoding means, for facilitating transmission of the transmission sequence x(D), and a receiving unit having: C) decoding means, operably coupled to the channel means, for receiving and decoding a received transmission sequence r(D) to provide an estimated output sequence y(D); and D) recovery means, operably coupled to the decoding means, for substantially recovering an estimated sequence u(D) for said sequence u(D) for a transmitted signal point sequence x(D), selected from a subset of all possible signal point sequences that are of a form u(D)+d(D), wherein u(D) is a signal point sequence from a translate of said trellis code C and uniquely represents said digital data sequence and wherein d(D) represents a nonzero difference between a selected nonzero code sequence c(D) from said trellis code C and a post-cursor intersymbol interference (ISI) sequence p(D) substantially of a form p(D)=x(D)[h(D)-1], such that c(D) is selected based only upon p(D), wherein the precoding unit further comprises: first combining means, operably coupled to the mapping means, and to a slicing means, for combining u(D) and at least the code sequence c(D) to provide a combiner output sequence s(D), wherein the slicing means is operably coupled to the filtering means, and is utilized for slicing the post-cursor sequence p(D) to a selected code sequence of signal points c(D) selected from the trellis code C, and a filtering means is operably coupled to the first combining means, and is utilized for extracting the post-cursor ISI sequence p(D), wherein u(D) is an arbitrary complex sequence from a translate of an n-dimensional trellis code C based on a partition Λ/Λ' (i.e., a partition of a lattice Λ into its sublattice Λ' ) where n is a selected integer, and the slicing means provides a sequence of symbols from the sublattice Λ' as the selected sequence c(D) on a symbol-by-symbol basis, and where interleaving is preselected, the precoding unit further includes an interleaving means for providing an interleaved coded sequence, x'(D), to the channel means, and said system further including: first deinterleaving means, operably coupled to receive r(D), for providing a deinterleaved r(D) sequence to the decoding means, an interleaving means, operably coupled to the decoding means, for providing an interleaved estimate of the decoded sequence, y'(D), to the recovery means, and wherein the recovery means further includes second deinterleaving means for deinterleaving the interleaved estimate of the decoded sequence, y'(D).