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US5455452A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor package having an LOC structure

Assignee: International Business Machines Corp
•
Filing: 1994-06-02
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Granted: 1995-10-03
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Expires: 2014-06-02
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Abstract

Abstract A semiconductor integrated circuit device and method of making same wherein recessed bus bar regions are provided in an elongated bus bar to accommodate bonding wires which couple the device's chip pads and associated inner leads. Fillets are formed of insulative adhesive material (from the tape used to secure the leads and bus bar to the chip) up about the bus bar region sides to thereby engage the bonding wires to prevent contact between the wires and bus bar.

Inventors

  • 👤 Satsuo Kiyono

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 20:09
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/5366; H10W72/551; H10W72/552; H10W72/851; H10W72/853; H10W72/865; H10W72/90; H10W72/951; H10W74/00; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 153 words
A semiconductor integrated circuit device comprising: a semiconductor chip; inner leads arranged on said semiconductor chip and including tip portions; bonding pads arranged on said semiconductor chip; a bus bar placed on said semiconductor chip between said inner leads and said bonding pads; bonding wires connecting tip portions of said inner leads and said bonding pads so as to traverse said bus bar; and an electrically insulative adhesive tape bonding said inner leads and said bus bar to said semiconductor chip, said bus bar including recessed, stepped portions defining bus bar regions which are to be traversed by said bonding wires, said adhesive tape including fillets formed on side surfaces of said inner leads and said bus bar relative to said bus bar regions for engaging said bonding wires to prevent short circuiting between said wires and said bus bar regions should said bonding wires come in close proximity to said bus bar.
Claim 2
Dependent Claim 153 words
A semiconductor integrated circuit device comprising: a semiconductor chip; inner leads arranged on said semiconductor chip and including tip portions; bonding pads arranged on said semiconductor chip; a bus bar placed on said semiconductor chip between said inner leads and said bonding pads; bonding wires connecting tip portions of said inner leads and said bonding pads so as to traverse said bus bar; and an electrically insulative adhesive tape bonding said inner leads and said bus bar to said semiconductor chip, said bus bar including recessed, stepped portions defining bus bar regions which are to be traversed by said bonding wires, said adhesive tape including fillets formed on side surfaces of said inner leads and said bus bar relative to said bus bar regions for engaging said bonding wires to prevent short circuiting between said wires and said bus bar regions should said bonding wires come in close proximity to said bus bar.
Claim 3
Dependent Claim 30 words
The semiconductor integrated circuit device according to claim 1, wherein the height of the steps of said recessed bus bar regions is half the total thickness of said bus bar.
Claim 4
Dependent Claim 32 words
The semiconductor integrated circuit device according to claim 1, wherein said fillets are formed so as to cover said side surfaces and a top surface of each of said bus bar regions.
Claim 5
Dependent Claim 26 words
The semiconductor integrated circuit device according to claim 1, wherein said fillets are formed so as to stand erect on both sides of the bus bar.
Claim 6
Dependent Claim 18 words
The semiconductor integrated circuit device according to claim 1, wherein said insulative tape is a thermosetting insulative tape.
Claim 7
Dependent Claim 18 words
The semiconductor integrated circuit device according to claim 1, wherein said insulative tape is a thermoplastic insulative tape.
Claim 8
Dependent Claim 31 words
The semiconductor integrated circuit device according to claim 1, wherein said insulative tape is a single-layer insulative tape of a material selected from the group consisting of polyimide and epoxy resin.
Claim 9
Dependent Claim 29 words
The semiconductor integrated circuit device according to claim 5, wherein said thermosetting insulative tape includes a base layer with two surfaces, each of said surfaces including an adhesive thereon.
Claim 10
Dependent Claim 30 words
The semiconductor integrated circuit device of claim 8 wherein said base layer is comprised of polyimide and said adhesive is selected from the group consisting of epoxy and phenol-type adhesives.

References Cited (Backward Citations)

JPH03129840A Cited
JPH03204965A Cited
US5357139A Cited
JPH03255655A Cited
JPH04114438A Cited
JPH0513654A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-10-02 1999-04-03 1999-10-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-10-02 2003-04-03 2003-10-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-10-02 2007-04-03 2007-10-03 $7700.00 Window Closed / Lapsed

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