Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
142 words
An electrostatic discharge (ESD) protection circuit for protecting an integrated circuit from an ESD event at an input/output pad connected to said integrated circuit, said ESD protection circuit comprising: a silicon controlled rectifier (SCR) circuit connected between said input/output pad and a device ground of said integrated circuit for absorbing current created by said ESD event at said input/output pad; and a triggering device for triggering said SCR circuit to absorb said current created by said ESD event, said triggering device comprising a trigger FET for activating said SCR circuit and an adjustable threshold device responsive to said ESD event at said input/output pad for applying a trigger voltage to a gate of said trigger FET so as to activate said SCR circuit upon receipt of said ESD event at said input/output pad independent of a junction breakdown of said trigger FET.
Claim 2
Dependent Claim
142 words
An electrostatic discharge (ESD) protection circuit for protecting an integrated circuit from an ESD event at an input/output pad connected to said integrated circuit, said ESD protection circuit comprising: a silicon controlled rectifier (SCR) circuit connected between said input/output pad and a device ground of said integrated circuit for absorbing current created by said ESD event at said input/output pad; and a triggering device for triggering said SCR circuit to absorb said current created by said ESD event, said triggering device comprising a trigger FET for activating said SCR circuit and an adjustable threshold device responsive to said ESD event at said input/output pad for applying a trigger voltage to a gate of said trigger FET so as to activate said SCR circuit upon receipt of said ESD event at said input/output pad independent of a junction breakdown of said trigger FET.
Claim 3
Dependent Claim
23 words
The circuit of claim 1 further comprising a well resistor formed between said input/output pad and circuitry being protected within said integrated circuit.
Claim 4
Dependent Claim
76 words
The circuit of claim 1 wherein said adjustable threshold device comprises: a FET powered by said ESD event for conducting an ESD voltage to an FET output; a voltage divider connected between said FET output and circuit ground and further having a voltage reduced output connected to a gate of said trigger FET wherein a voltage input to said FET is reduced by said voltage divider before being applied to said gate of said trigger FET.
Claim 5
Dependent Claim
24 words
The circuit of claim 3 further comprising a FET for grounding said voltage reduced output when power is being applied to said integrated circuit.
Claim 6
Dependent Claim
17 words
The circuit of claim 3 wherein said voltage divider comprises a pair of FETs connected in series.
Claim 7
Dependent Claim
15 words
The circuit of claim 5 wherein said pair of FETs connected in series comprises NFETs.
Claim 8
Dependent Claim
15 words
The circuit of claim 5 wherein said pair of FETs connected in series comprises PFETs.
Claim 9
Dependent Claim
67 words
The circuit of claim 1 wherein said adjustable threshold device comprises an inverter powered by said ESD event at said input/output pad; and a voltage divider having an input connected to an output of said inverter and having an output connected to said gate of said trigger FET, wherein a voltage output by said inverter is reduced before being applied to said gate of said trigger FET.
Claim 10
Dependent Claim
17 words
The circuit of claim 8 wherein said voltage divider comprises a pair of FETs connected in series.
Claim 11
Dependent Claim
26 words
The circuit of claim 8 further comprising a FET for grounding said output of said voltage divider when power is being applied to said integrated circuit.
Claim 12
Dependent Claim
154 words
An electrostatic discharge (ESD) protection circuit for protecting an integrated circuit from an ESD event at an input/output pad connected to said integrated circuit, said ESD protection circuit comprising: a silicon controlled rectifier (SCR) circuit connected between said input/output pad and a device ground of said integrated circuit for absorbing current created by said ESD event at said input/output pad; and a trigger device for triggering said SCR circuit to absorb said current created by said ESD event, comprising a trigger FET connected to activate said SCR circuit, a FET powered by said ESD event for conducting an ESD voltage to a FET output, and a voltage divider connected between said FET output and circuit ground and further having a voltage reduced output connected to a gate of said trigger FET wherein a voltage input to said FET is reduced by said voltage divider before being applied to said gate of said trigger FET.
Claim 13
Dependent Claim
154 words
An electrostatic discharge (ESD) protection circuit for protecting an integrated circuit from an ESD event at an input/output pad connected to said integrated circuit, said ESD protection circuit comprising: a silicon controlled rectifier (SCR) circuit connected between said input/output pad and a device ground of said integrated circuit for absorbing current created by said ESD event at said input/output pad; and a trigger device for triggering said SCR circuit to absorb said current created by said ESD event, comprising a trigger FET connected to activate said SCR circuit, a FET powered by said ESD event for conducting an ESD voltage to a FET output, and a voltage divider connected between said FET output and circuit ground and further having a voltage reduced output connected to a gate of said trigger FET wherein a voltage input to said FET is reduced by said voltage divider before being applied to said gate of said trigger FET.
Claim 14
Dependent Claim
24 words
The circuit of claim 11 further comprising a FET for grounding said voltage reduced output when power is being applied to said integrated circuit.
Claim 15
Dependent Claim
17 words
The circuit of claim 11 wherein said voltage divider comprises a pair of FETs connected in series.
Claim 16
Dependent Claim
23 words
The circuit of claim 11 further comprising a well resistor formed between said input/output pad and circuitry being protected within said integrated circuit.