Method of reducing noise signals caused by fluctuations in power requirements of digital signal processor having recurring wait routines

Claim 1

A method of reducing spurious signals caused by changes in power consumed by a processor which includes internal logic that requires varying-amounts of current in accordance with activities performed by said logic, said processor executing a plurality of instructions to control said activities of said internal logic, said power consumed by said processor at a particular time being dependent on a particular one of said plurality of instructions being executed at said particular time, said processor performing cyclically recurring program routines that include sequences of said plurality of instructions, said program routines being repeatedly initiated by said processor, said cyclically recurring program routines having respective run times which result in a first mean power consumption for said processor while running said program routines during said run times, said method comprising the steps of; performing a predetermined wait routine by said processor between each occurrence of said cyclically recurring program routines; and executing selected operations by said processor during said predetermined wait routine, said selected operations including selected activities performed by said internal logic of said processor to cause said current required by said internal logic to have a predetermined mean current magnitude, said predetermined mean current magnitude causing said power required by said processor to execute said selected operations to have a second mean power consumption while executing said selected operations approximately equal to said first mean power consumption, wherein said internal logic of said processor comprises a data bus, said bus requiring varying amounts of currents in accordance with data transferred on said bus, said selected operations including data transfer instructions that cause data to be transferred on said data bus, said data selected to cause said data bus to require an increased amount of current and to increase said power consumed by said processor during said wait routine.

Claim 2

A method of reducing spurious signals caused by changes in power consumed by a processor which includes internal logic that requires varying-amounts of current in accordance with activities performed by said logic, said processor executing a plurality of instructions to control said activities of said internal logic, said power consumed by said processor at a particular time being dependent on a particular one of said plurality of instructions being executed at said particular time, said processor performing cyclically recurring program routines that include sequences of said plurality of instructions, said program routines being repeatedly initiated by said processor, said cyclically recurring program routines having respective run times which result in a first mean power consumption for said processor while running said program routines during said run times, said method comprising the steps of; performing a predetermined wait routine by said processor between each occurrence of said cyclically recurring program routines; and executing selected operations by said processor during said predetermined wait routine, said selected operations including selected activities performed by said internal logic of said processor to cause said current required by said internal logic to have a predetermined mean current magnitude, said predetermined mean current magnitude causing said power required by said processor to execute said selected operations to have a second mean power consumption while executing said selected operations approximately equal to said first mean power consumption, wherein said internal logic of said processor comprises a data bus, said bus requiring varying amounts of currents in accordance with data transferred on said bus, said selected operations including data transfer instructions that cause data to be transferred on said data bus, said data selected to cause said data bus to require an increased amount of current and to increase said power consumed by said processor during said wait routine.