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US5446309A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device including a first chip having an active element and a second chip having a passive element

Assignee: Panasonic Holdings Corp
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Filing: 1993-05-28
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Granted: 1995-08-29
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Expires: 2013-05-28
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Abstract

Abstract A semiconductor device includes a first chip and a second chip. Active elements such as transistors are fabricated on the surface of the semiconductor substrate of the first chip. Passive elements such as inductors and capacitors are fabricated on the second chip. The first chip is so disposed on the second chip that the reverse surface of the first chip makes a contact onto the surface of the second chip. The active element and the passive element are electrically connected by bonding wire.

Inventors

  • 👤 Chinatsu Adachi
  • 👤 Masaaki Nishijima
  • 👤 Yorito Ota
  • 👤 Osamu Ishikawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 16:00
CPC Classifications
H; H10; H10W; H10W90/00; H10W20/00; H10W20/20; H10W72/00; H10W72/30; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W90/701; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 155 words
A semiconductor device comprising: a first chip having a first semiconductor substrate including a first surface and an opposite second surface, at least one active element without passive elements fabricated on said first surface, a second chip having a second semiconductor substrate including a third surface which has at least one passive element without active elements, and wherein the first chip is mounted on a grounding electrode formed on the third surface of the second semiconductor substrate so that the second surface of the first semiconductor substrate makes direct contact to the grounding electrode, and the active element of the first chip is coupled to a reverse surface electrode, which is electrically connected to the grounding electrode, through a via-hole conductor provided in the semiconductor substrate of the first chip, and at least the active element of the first chip is electrically connected by a bonding conductor to the passive element of the second chip.
Claim 2
Dependent Claim 155 words
A semiconductor device comprising: a first chip having a first semiconductor substrate including a first surface and an opposite second surface, at least one active element without passive elements fabricated on said first surface, a second chip having a second semiconductor substrate including a third surface which has at least one passive element without active elements, and wherein the first chip is mounted on a grounding electrode formed on the third surface of the second semiconductor substrate so that the second surface of the first semiconductor substrate makes direct contact to the grounding electrode, and the active element of the first chip is coupled to a reverse surface electrode, which is electrically connected to the grounding electrode, through a via-hole conductor provided in the semiconductor substrate of the first chip, and at least the active element of the first chip is electrically connected by a bonding conductor to the passive element of the second chip.
Claim 3
Dependent Claim 46 words
A semiconductor device according to claim 1, wherein the grounding electrode and a second reverse surface electrode formed on a reverse surface of the semiconductor substrate of the second chip are electrically connected through a via-hole conductor provided in the semiconductor substrate of the second chip.
Claim 4
Dependent Claim 150 words
A semiconductor device comprising: at least one first chip having a first GaAs substrate including a first surface and an opposing second surface, at least one transistor is fabricated on said first surface containing at least a source electrode, a second chip having a second GaAs substrate including a third surface on which at least one inductor, at least one capacitor and at least one grounding electrode are formed, said first chip being mounted on said second chip so that the second surface of said first GaAs substrate makes direct contact to the third surface of said second GaAs substrate, said transistor being electrically connected by a bonding conductor to at least one of said inductor and said capacitor, and said source electrode of said transistor being electrically connected to said grounding electrode of said second chip through a via-hole conductor provided in the GaAs substrate of said first chip.
Claim 5
Dependent Claim 150 words
A semiconductor device comprising: at least one first chip having a first GaAs substrate including a first surface and an opposing second surface, at least one transistor is fabricated on said first surface containing at least a source electrode, a second chip having a second GaAs substrate including a third surface on which at least one inductor, at least one capacitor and at least one grounding electrode are formed, said first chip being mounted on said second chip so that the second surface of said first GaAs substrate makes direct contact to the third surface of said second GaAs substrate, said transistor being electrically connected by a bonding conductor to at least one of said inductor and said capacitor, and said source electrode of said transistor being electrically connected to said grounding electrode of said second chip through a via-hole conductor provided in the GaAs substrate of said first chip.
Claim 6
Dependent Claim 49 words
A semiconductor device according to claim 3, wherein the grounding electrode formed on the surface of the second chip is electrically connected to a reverse surface electrode formed on a reverse surface of the second chip through a via-hole conductor, provided in the GaAs substrate of said second chip.
Claim 7
Dependent Claim 165 words
A semiconductor device comprising: a first chip having a first semiconductor substrate including a first surface and an opposite second surface, at least one active element without passive elements fabricated on said first surface, a second chip having a second semiconductor substrate including a third surface which has at least one passive element without active elements, and a grounding electrode is formed on the third surface of the second semiconductor substrate, and wherein the first chip is mounted on the second chip so that the second surface of the first semiconductor substrate makes direct contact to the third surface of the second semiconductor substrate, and the active element of the first chip is coupled to a reverse surface electrode, which is electrically connected to the grounding electrode, through a via-hole conductor provided in the semiconductor substrate of the first chip, and at least the active element of the first chip is electrically connected by a bonding conductor to the passive element of the second chip.
Claim 8
Dependent Claim 165 words
A semiconductor device comprising: a first chip having a first semiconductor substrate including a first surface and an opposite second surface, at least one active element without passive elements fabricated on said first surface, a second chip having a second semiconductor substrate including a third surface which has at least one passive element without active elements, and a grounding electrode is formed on the third surface of the second semiconductor substrate, and wherein the first chip is mounted on the second chip so that the second surface of the first semiconductor substrate makes direct contact to the third surface of the second semiconductor substrate, and the active element of the first chip is coupled to a reverse surface electrode, which is electrically connected to the grounding electrode, through a via-hole conductor provided in the semiconductor substrate of the first chip, and at least the active element of the first chip is electrically connected by a bonding conductor to the passive element of the second chip.
Claim 9
Dependent Claim 46 words
A semiconductor device according to claim 5, wherein the grounding electrode and a second reverse surface electrode formed on a reverse surface of the semiconductor substrate of the second chip are electrically connected through a via-hole conductor provided in the semiconductor substrate of the second chip.

References Cited (Backward Citations)

JPS6041249A Cited
US4697095A Cited
JPH01228202A Cited
JPH0262069A Cited
US4890077A Cited
US5008736A Cited
JPH03222492A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-08-28 1999-02-27 1999-08-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-08-28 2003-02-27 2003-08-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-08-28 2007-02-27 2007-08-29 $7700.00 Window Closed / Lapsed

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