Equalizer for data receiver apparatus

Claim 1

A data receiver apparatus including: a memory storing a received signal transmitted through a signal transmission channel and demodulated into its baseband signal by a demodulator; an equalizer equalizing the received signal to provide an equalized output signal; an error corrector correcting any error included in the output signal from said equalizer to provide an error corrected output signal; and a voice decoder decoding voice data of the output signal of said error corrector, said equalizer comprising: a plurality of delay elements successively delaying the received signal applied to said equalizer from said memory to provide successively delayed output signals; a plurality of weighting elements multiplying the received signal from said memory and the successively delayed output signals from said plurality of delay elements by their weight coefficients respectively; an adder adding output signals from said weighting elements to obtain a result of addition; a discriminator converting the result of addition by said adder into a predetermined amplitude; feedback paths including a further delay element for feeding an output of said discriminator back to the respective output terminals of said plurality of delay elements; a plurality of selector switches; and control means for selecting said feedback paths to selectively connect output terminals of said plurality of delay elements to the input terminals of said plurality of weighting elements.