US5432791A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Device for synchronizing system clock using detected synchromization signal
Assignee: Microsemi Semiconductor ULC
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Filing: 1992-07-22
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Granted: 1995-07-11
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Expires: 2012-07-22
Abstract
Abstract A digital switching system comprises a plurality of digital interface cards for connection to a public telecommunications network, each card including at least one digital interface circuit with a synchronization detector for detecting a network synchronization signal. A control unit includes a system clock having a clock synchronization input. A a system bus carries data through the switching system and is connected between the interface cards and the control unit. A switch in the interface cards is operative in response to control data from the control unit and carried over the system bus in an overhead channel to connect the synchronization detector of a selected active digital interface circuit to the clock synchronization input of the system clock over a clock synchronization line so as to pass detected synchronization signals on the active circuit directly thereto. The system clock can thus be brought directly into synchronization with the detected synchronization signal of the active interface unit.
Inventors
- 👤 Ed Gancarcik
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:15
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685; H04L; H04L7/00; H04L7/02; H04L7/033; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0435; H04Q11/0471; H04Q2213/00; H04Q2213/214; H04Q2213/36
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
173 words
A digital switching system comprising: a) a plurality of digital interface means for connection to a public telecommunications network, each said digital interface means including at least one digital interface circuit with a synchronization detector for detecting a network synchronization signal; b) a control unit including a system clock having a clock synchronization input; c) a system bus for carrying data through the switching system and connected between said interface means and said control unit; and d) switch means in said interface means, said switch means being operative in response to control data from said control unit and carried over said system bus in an overhead channel to connect the synchronization detector of a selected said digital interface circuit, which constitutes an active interface unit, to said clock synchronization input of said system clock over a clock synchronization line so as to pass detected synchronization signals on said active interface circuit directly thereto; whereby said system clock can be brought directly into synchronization with the detected synchronization signal of the active interface circuit.
Claim 2
Dependent Claim
173 words
A digital switching system comprising: a) a plurality of digital interface means for connection to a public telecommunications network, each said digital interface means including at least one digital interface circuit with a synchronization detector for detecting a network synchronization signal; b) a control unit including a system clock having a clock synchronization input; c) a system bus for carrying data through the switching system and connected between said interface means and said control unit; and d) switch means in said interface means, said switch means being operative in response to control data from said control unit and carried over said system bus in an overhead channel to connect the synchronization detector of a selected said digital interface circuit, which constitutes an active interface unit, to said clock synchronization input of said system clock over a clock synchronization line so as to pass detected synchronization signals on said active interface circuit directly thereto; whereby said system clock can be brought directly into synchronization with the detected synchronization signal of the active interface circuit.
Claim 3
Dependent Claim
44 words
A switching system as claimed in claim 1, wherein said digital interface circuits comprise basic rate circuits in an ISDN system, and said switch means comprise a plurality of switches connected to respective groups of basic rate interface circuits in each said interface means.
Claim 4
Dependent Claim
37 words
A switching system as claimed in claim 1, wherein said system bus is a standard 2,048 mbps serial telephone bus with 32 channel frames, and said control data are sent in the first channel of each frame.
Claim 5
Dependent Claim
34 words
A switching system as claimed in claim 1, further comprising divider means in said digital interface means for dividing the detected synchronization signal to a lower frequency so as to reduce radiated electromagnetic interference.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-10 | 1999-01-09 | 1999-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-10 | 2003-01-09 | 2003-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-10 | 2007-01-09 | 2007-07-11 | $7700.00 | Window Closed / Lapsed |