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US5428244A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having a silicon rich dielectric layer

Assignee: Panasonic Holdings Corp
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Filing: 1993-06-28
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Granted: 1995-06-27
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Expires: 2013-06-28
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Abstract

Abstract The adhesion between a metallic silicide film and a dielectric layer of a semiconductor device is improved. Formed on a silicon substrate is a gate dielectric layer formed on which is a metallic silicide film. A silicon dielectric layer of a rich-in-silicon-content type, which have a silicon content higher than a silicon content according to the stoichiometric composition formula, is deposited on the metallic silicide film. Because of this arrangement, a semiconductor device which is free from film peeling and which has an electrode wire with a low electrical resistance is achievable without decreasing the concentration of impurity at an electrode. If a passivation silicon oxide layer whose composition is close to a composition according to the stoichiometric composition formula is formed on the silicon oxide layer of a rich-in-silicon-content type, the degradation of the inside of an electrode, and the degradation of a gate oxide layer both caused by unwanted impurities from the outside can be prevented. This invention is available not only to a silicon oxide layer but also to a silicon nitride layer.

Inventors

  • 👤 Mizuki Segawa
  • 👤 Yoshiaki Kato
  • 👤 Hiroaki Nakaoka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 21:56
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10W20/45; H10W20/48; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/01346; H10D64/66; H10D64/68

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 92 words
A semiconductor device comprising: (a) a metallic silicide film, said metallic silicide film being formed above a semiconductor substrate and being composed of a first chemical compound of silicon and a metal element having a high melting point such as tungsten, molybdenum, and titanium, and (b) a dielectric layer formed on said metallic silicide film, said dielectric layer being composed of a second chemical compound of silicon and a different element, and having a silicon content higher than the silicon content according to the stoichiometric composition formula of the second chemical compound.
Claim 2
Dependent Claim 92 words
A semiconductor device comprising: (a) a metallic silicide film, said metallic silicide film being formed above a semiconductor substrate and being composed of a first chemical compound of silicon and a metal element having a high melting point such as tungsten, molybdenum, and titanium, and (b) a dielectric layer formed on said metallic silicide film, said dielectric layer being composed of a second chemical compound of silicon and a different element, and having a silicon content higher than the silicon content according to the stoichiometric composition formula of the second chemical compound.
Claim 3
Dependent Claim 53 words
A semiconductor device as in claim 1, further comprising a polysilicon layer which is formed above said semiconductor substrate, wherein: (a) said metallic silicide film is deposited on said polysilicon layer, and (b) said polysilicon layer and said metallic silicide film as one integral body function as an electrode or as a wire.
Claim 4
Dependent Claim 68 words
A semiconductor device as in either claim 1 or claim 2, further comprising a dielectric layer for passivation, said passivation dielectric layer being formed on said dielectric layer type, being composed of a chemical compound which is the same compound that said dielectric layer is composed of, and having a silicon content closer to a silicon content according to the stoichiometric composition formula, compared to the dielectric layer.
Claim 5
Dependent Claim 42 words
A semiconductor device as in either claim 1 or claim 2, wherein the silicon content of said dielectric layer becomes increasingly less rich in silicon content and approaches the stoichiometric composition formula in a direction from the bottom to the top thereof.
Claim 6
Dependent Claim 32 words
A semiconductor device as in either claim i or claim 2, wherein said dielectric layer is a silicon oxide layer whose stoichiometric composition formula is SiO 2 with an excessive silicon content.
Claim 7
Dependent Claim 34 words
A semiconductor device as in either claim 1 or claim 2, wherein said dielectric layer is a silicon nitride layer whose stoichiometric composition formula is Si 3 N 4 with an excessive silicon content.
Claim 8
Dependent Claim 70 words
A semiconductor device as in claim i wherein said semiconductor device is a CMOS transistor, further comprising: (a) a gate dielectric layer which is formed on said semiconductor substrate, and (b) a polysilicon layer which formed on said gate dielectric layer, wherein said metallic silicide film is deposited on said polysilicon layer, and said polysilicon layer and said metallic silicide film function as a gate electrode of said CMOS transistor.

References Cited (Backward Citations)

JPS63284857A Cited
JPS63316476A Cited
JPS6425572A Cited
US5248892A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-06-26 1998-12-26 1999-06-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-06-26 2002-12-26 2003-06-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-06-26 2006-12-26 2007-06-27 $7700.00 Window Closed / Lapsed

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