Thin film transistor array having optical shield layer

Claim 2

A thin film transistor array comprising: a transparent insulating substrate; a plurality of gate bus lines formed on said transparent insulating layer; a plurality of drain bus lines formed on said transparent insulating layer; a plurality of transparent pixel electrodes formed on said transparent insulating layer; a plurality of thin film transistors each having a gate electrode connected to one of said gate bus lines, a semiconductor active layer formed on said gate electrode via an insulating layer, a drain electrode connected between said semiconductor active layer and one of said drain bus lines, and a source electrode connected between said semiconductor active layer and one of said transparent pixel electrodes; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said source electrode of the associated thin film transistor.

Claim 3

An array as set forth in claim 4, wherein each of said optical shield means is located between said semiconductor active layer and one of said transparent pixel electrodes.

Claim 4

An array as set forth in claim 4, wherein each of said optical shield means is located between one of said drain electrodes and one of said drain bus lines.

Claim 5

An array as set forth in claim 1, wherein said semiconductor active layer is made of amorphous silicon.

Claim 6

An apparatus as set forth in claim 1, wherein each of said plurality of optical shield means further comprises an extension of the drain electrode of its associated thin film transistor.

Claim 7

A thin film transistor array comprising: a transparent insulating substrate; a plurality of gate bus lines formed on said transparent insulating layer; a plurality of drain bus lines formed on said transparent insulating layer; a plurality of transparent pixel electrodes formed on said transparent insulating layer; a plurality of thin film transistors each having a gate electrode connected to one of said gate bus lines, a semiconductor active layer formed on said gate electrode via an insulating layer, a drain electrode connected between said semiconductor active layer and one of said drain bus lines, and a source electrode connected between said semiconductor active layer and one of said transparent pixel electrodes; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said drain electrode of the associated thin film transistor.

Claim 8

A thin film transistor array comprising: a transparent insulating substrate; a plurality of gate bus lines formed on said transparent insulating layer; a plurality of drain bus lines formed on said transparent insulating layer; a plurality of transparent pixel electrodes formed on said transparent insulating layer; a plurality of thin film transistors each having a gate electrode connected to one of said gate bus lines, a semiconductor active layer formed on said gate electrode via an insulating layer, a drain electrode connected between said semiconductor active layer and one of said drain bus lines, and a source electrode connected between said semiconductor active layer and one of said transparent pixel electrodes; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said drain electrode of the associated thin film transistor.

Claim 9

An array as set forth in claim 6, wherein each of said optical shield means is located between said semiconductor active layer and one of said transparent pixel electrodes.

Claim 10

An array as set forth in claim 6, wherein each of said optical shield means is located between one of said drain electrodes and one of said drain bus lines.

Claim 11

An array as set forth in claim 6, wherein said semiconductor active layer is made of amorphous silicon.

Claim 12

An active Matrix-type display apparatus comprising: first and second transparent insulating substrates, arranged in parallel to each other and having electro-optic material therebetween; a plurality of gate bus lines in parallel to each other formed on said first transparent insulating substrate; a plurality of drain bus lines in parallel to each other formed on said first transparent insulating substrate, said drain bus lines being perpendicular to said gate bus lines; a plurality of gate electrodes formed on said first transparent insulating layer, each of said gate electrodes being connected to one of said gate bus lines; an insulating layer formed on said gate electrodes; a plurality of transparent pixel electrodes formed on said insulating layer; a plurality of semiconductor active layers formed on said insulating layer, each of said semiconductor active layers opposing one of said gate electrodes; a plurality of drain electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said drain bus lines; a plurality of source electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said transparent pixel electrodes; a counter electrode formed beneath said second transparent insulating substrate; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said source electrode of the associated thin film transistor.

Claim 13

An active Matrix-type display apparatus comprising: first and second transparent insulating substrates, arranged in parallel to each other and having electro-optic material therebetween; a plurality of gate bus lines in parallel to each other formed on said first transparent insulating substrate; a plurality of drain bus lines in parallel to each other formed on said first transparent insulating substrate, said drain bus lines being perpendicular to said gate bus lines; a plurality of gate electrodes formed on said first transparent insulating layer, each of said gate electrodes being connected to one of said gate bus lines; an insulating layer formed on said gate electrodes; a plurality of transparent pixel electrodes formed on said insulating layer; a plurality of semiconductor active layers formed on said insulating layer, each of said semiconductor active layers opposing one of said gate electrodes; a plurality of drain electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said drain bus lines; a plurality of source electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said transparent pixel electrodes; a counter electrode formed beneath said second transparent insulating substrate; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said source electrode of the associated thin film transistor.

Claim 14

An apparatus as set forth in claim 10, wherein each of said optical shield means is located between one of said semiconductor active layers and one of said transparent pixel electrodes.

Claim 15

An apparatus as set forth in claim 10, wherein each of said optical shield means is located between one of said drain electrodes and one of said drain bus lines.

Claim 16

An apparatus as set forth in claim 10, wherein said semiconductor active layers are made of amorphous silicon.

Claim 17

An apparatus as set forth in claim 10, wherein each of said plurality of optical shield means further comprises an extension of the drain electrode of its associated thin film transistor.

Claim 18

An active matrix-type display apparatus comprising: first and second transparent insulating substrates, arranged in parallel to each other and having electro-optic material therebetween; a plurality of gate bus lines in parallel to each other formed on said first transparent insulating substrate; a plurality of drain bus lines in parallel to each other formed on said first transparent insulating substrate, said drain bus lines being perpendicular to said gate bus lines; a plurality of gate electrodes formed on said first transparent insulating layer, each of said gate electrodes being connected to one of said gate bus lines; an insulating layer formed on said gate electrodes; a plurality of transparent pixel electrodes formed on said insulating layer; a plurality of semiconductor active layers formed on said insulating layer, each of said semiconductor active layers opposing one of said gate electrodes; a plurality of drain electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said drain bus lines; a plurality of source electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said transparent pixel electrodes; a counter electrode formed beneath said second transparent insulating substrate; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said drain electrode of the associated thin film transistor.

Claim 19

An active matrix-type display apparatus comprising: first and second transparent insulating substrates, arranged in parallel to each other and having electro-optic material therebetween; a plurality of gate bus lines in parallel to each other formed on said first transparent insulating substrate; a plurality of drain bus lines in parallel to each other formed on said first transparent insulating substrate, said drain bus lines being perpendicular to said gate bus lines; a plurality of gate electrodes formed on said first transparent insulating layer, each of said gate electrodes being connected to one of said gate bus lines; an insulating layer formed on said gate electrodes; a plurality of transparent pixel electrodes formed on said insulating layer; a plurality of semiconductor active layers formed on said insulating layer, each of said semiconductor active layers opposing one of said gate electrodes; a plurality of drain electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said drain bus lines; a plurality of source electrodes formed on said insulating layer, each of said drain electrodes being connected between one of said semiconductor active layers and one of said transparent pixel electrodes; a counter electrode formed beneath said second transparent insulating substrate; and a plurality of optical shield means associated with said thin film transistors, each of said plurality of optical shield means approximately surrounding said semiconductor active layer of a thin film transistor, wherein each of said optical shield means comprises an extension of said drain electrode of the associated thin film transistor.

Claim 20

An apparatus as set forth in claim 15, wherein each of said optical shield means is located between one of said semiconductor active layers and one of said transparent pixel electrodes.

Claim 21

An apparatus as set forth in claim 15, wherein each of said optical shield means is located between one of said drain electrodes and one of said drain bus lines.

Claim 22

An apparatus as set forth in claim 15, wherein said semiconductor active layers are made of amorphous silicon.