Enhanced data analyzer for use in bist circuitry

Claim 1

A data analyzer for use in BIST circuitry for performing both comparison analysis and signature analysis on a circuit, comprising: a plurality of data registers being serially-coupled and responsive to a plurality of output signals from the circuit, each one of said plurality of data registers having an input and an output and including: (a) first means for comparing one of said output signals from the circuit to an expected signal, said first means having an output; (b) second means for combining said one of said output signals from the circuit with another one of said output signals from the circuit, said second means having an output; (c) third means responsive to a control signal for alternately selecting whether said plurality of data registers are performing comparison analysis or signature analysis, said third means having a plurality of inputs, a first one of said plurality of inputs being coupled to said output of said first means, a second one of said plurality of inputs being coupled to said output of said second means, a third one of said plurality of inputs being coupled to said input of its respective data register for receiving an output signal from a previous adjacent data register of said plurality of data registers, said third means having an output; and (d) fourth means responsive to a clock signal for storing a value appearing at said output of said third means, said fourth means having an input coupled to said output of said third means, said fourth means having an output coupled to said output of its respective data register.