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US5424490A Expired / Lapsed US ⏱️ 0.0 years remaining

Twisted lead pairs on PCB to improve common mode rejection

Assignee: Sony Electronics Inc
•
Filing: 1994-02-25
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Granted: 1995-06-13
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Expires: 2014-02-25
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Abstract

Abstract The invention in its main aspect comprises a printed circuit board having a bus extending along a predetermined length of a portion of said printed circuit board, the bus having a predetermined width and defining a plurality of openings therein following a predetermined regular pattern, the pattern having at least a first pair of openings positioned on a first lateral side of an imaginary line along the bus, and at least a second pair of openings positioned on a second lateral side of the imaginary line along the bus, the first and the second pairs of openings being relatively arranged so that a first lead interconnecting the first pair of openings is in a twisted pair relationship with a second lead interconnecting the second pair of openings.

Inventors

  • 👤 Joseph J. Dombrowski
  • 👤 Donald E. Davis
  • 👤 Alberto M. Gonzalez
  • 👤 Kevin T. Lobb

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 20:29
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0228; H05K1/0237; H05K1/0245; H05K2201/00; H05K2201/04; H05K2201/044; H05K2201/09; H05K2201/09209; H05K2201/09654; H05K2201/097

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 186 words
A printed circuit board, comprising: a substantially planar circuit board having a first surface and a second surface on the opposite side of said first surface; a plurality of bus structures extending along a horizontal length of a portion of said circuit board, said bus structures comprising a plurality of through holes arranged successively at predetermined intervals along said horizontal length, with each successive through hole being offset in a vertical direction by a predetermined distance, wherein each successive pair of through holes in each bus structure, starting with a first through hole and a next, second through hole, is connected by a conductive lead formed on said first surface, and each successive pair of through holes in each bus structure, starting with said second through hole and a next, third through hole, is connected by another conductive lead formed on said second surface, whereby a twisted pair structure is defined by each bus structure; wherein a distance between said predetermined interval for at least one of said plurality of bus structures differs from that of one or more others of said plurality of bus structures.
Claim 2
Dependent Claim 186 words
A printed circuit board, comprising: a substantially planar circuit board having a first surface and a second surface on the opposite side of said first surface; a plurality of bus structures extending along a horizontal length of a portion of said circuit board, said bus structures comprising a plurality of through holes arranged successively at predetermined intervals along said horizontal length, with each successive through hole being offset in a vertical direction by a predetermined distance, wherein each successive pair of through holes in each bus structure, starting with a first through hole and a next, second through hole, is connected by a conductive lead formed on said first surface, and each successive pair of through holes in each bus structure, starting with said second through hole and a next, third through hole, is connected by another conductive lead formed on said second surface, whereby a twisted pair structure is defined by each bus structure; wherein a distance between said predetermined interval for at least one of said plurality of bus structures differs from that of one or more others of said plurality of bus structures.
Claim 3
Dependent Claim 21 words
The printed circuit board as set forth in claim 1 wherein said first surface is adapted to receive circuit components thereon.

References Cited (Backward Citations)

US3757028A Cited
US5039824A Cited
US5036160A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-06-12 1998-12-12 1999-06-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-06-12 2002-12-12 2003-06-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-06-12 2006-12-12 2007-06-13 $7700.00 Window Closed / Lapsed

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