US5422983A
Expired / Lapsed
US
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Neural engine for emulating a neural network
Assignee: The AT&T MVPD Group LLC
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Filing: 1993-07-19
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Granted: 1995-06-06
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Expires: 2013-07-19
Abstract
Abstract The neural engine (20) is a hardware implementation of a neural network for use in real-time systems. The neural engine (20) includes a control circuit (26) and one or more multiply/accumulate circuits (28). Each multiply/accumulate circuit (28) includes a parallel/serial arrangement of multiple multiplier/accumulators (84) interconnected with weight storage elements (80) to yield multiple neural weightings and sums in a single clock cycle. A neural processing language is used to program the neural engine (20) through a conventional host personal computer (22). The parallel processing permits very high processing speeds to permit real-time pattern classification capability.
Inventors
- 👤 Patrick F. Castelaz
- 👤 Dwight E. Mills
- 👤 Steven C. Woo
- 👤 Jack I. Jmaev
- 👤 Tammy L. Henrikson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:44
CPC Classifications
G; G06; G06N; G06N3/00; G06N3/02; G06N3/06; G06N3/063
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
282 words
A system for emulating a neural network, said neural network to be emulated having architecture, operation mode and input data which are defined by a set of instructions, said system comprising: a host computer for receiving, storing and transmitting said set of instructions defining the neural network and the neural network's input data; a neural engine coupled to said host computer for processing said instructions and for performing neural network computations; said neural engine including a control circuit comprising a microprocessor slice means for receiving, storing and transmitting said set of instructions received from said host computer defining the architecture and operation mode of said neural network; each of said instructions having three fields, including opcode, source register and destination register fields, said instructions including register load and store instructions for initializing and storage of data in the microprocessor slice means; said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the microprocessor slice means; a plurality of multiply and accumulate modules coupled to said control circuit for performing multiply and accumulate functions of said neural network; and said multiply and accumulate modules each including a plurality of weight storage means for storing a set of interconnection weights and the multiply and accumulate modules also including a plurality of multiplier and accumulate devices for generating the product of said input data times said interconnection weights and summing up all products for each neuron in said neural network, each multiplier and accumulate device being coupled to one of said weight storage means, wherein said multiplier and accumulate devices simultaneously perform multiply and accumulate operations during a single clock cycle of said system.
Claim 2
Independent Claim
282 words
A system for emulating a neural network, said neural network to be emulated having architecture, operation mode and input data which are defined by a set of instructions, said system comprising: a host computer for receiving, storing and transmitting said set of instructions defining the neural network and the neural network's input data; a neural engine coupled to said host computer for processing said instructions and for performing neural network computations; said neural engine including a control circuit comprising a microprocessor slice means for receiving, storing and transmitting said set of instructions received from said host computer defining the architecture and operation mode of said neural network; each of said instructions having three fields, including opcode, source register and destination register fields, said instructions including register load and store instructions for initializing and storage of data in the microprocessor slice means; said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the microprocessor slice means; a plurality of multiply and accumulate modules coupled to said control circuit for performing multiply and accumulate functions of said neural network; and said multiply and accumulate modules each including a plurality of weight storage means for storing a set of interconnection weights and the multiply and accumulate modules also including a plurality of multiplier and accumulate devices for generating the product of said input data times said interconnection weights and summing up all products for each neuron in said neural network, each multiplier and accumulate device being coupled to one of said weight storage means, wherein said multiplier and accumulate devices simultaneously perform multiply and accumulate operations during a single clock cycle of said system.
Claim 3
Dependent Claim
23 words
The system of claim 1 wherein said control circuit includes a configuration storage means for storing said instructions received from said host computer.
Claim 4
Dependent Claim
31 words
The system of claim 2 wherein said configuration storage means further receives, stores and transmits to said neural engine a sigmoid look-up table for defining the neural network's neuron transfer functions.
Claim 5
Dependent Claim
36 words
The system of claim 1 wherein said emulated neural network has predefined connection weight values and said multiply and accumulate modules include weight storage means for receiving and storing connection weight values from said host computer.
Claim 6
Dependent Claim
15 words
The system of claim 4 further comprising offset values stored in said weight storage means.
Claim 7
Independent Claim
155 words
A method for emulating a neural network comprising the steps of: performing neural network computations in a neural engine; receiving from a host computer, storing and transmitting a set of instructions defining the operation of said neural network in a configuration storage means coupled to said neural engine; storing a set of neural network parameters in a microprocessor slice means; and arranging each of said instructions such that they have three fields, including opcode, source register and destination register fields, said instructions including register load and storage instructions for initializing and storage of said network parameters in said microprocessor slice, and said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the configuration storage means, and said set of instructions also including miscellaneous instructions for causing the neural engine to discontinue processing, interrupt said host computer, and jump instructions to next instruction to process.
Claim 8
Independent Claim
155 words
A method for emulating a neural network comprising the steps of: performing neural network computations in a neural engine; receiving from a host computer, storing and transmitting a set of instructions defining the operation of said neural network in a configuration storage means coupled to said neural engine; storing a set of neural network parameters in a microprocessor slice means; and arranging each of said instructions such that they have three fields, including opcode, source register and destination register fields, said instructions including register load and storage instructions for initializing and storage of said network parameters in said microprocessor slice, and said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the configuration storage means, and said set of instructions also including miscellaneous instructions for causing the neural engine to discontinue processing, interrupt said host computer, and jump instructions to next instruction to process.
Claim 9
Independent Claim
293 words
A system for emulating and reconfiguring a neural network, said neural network to be emulated having architecture, operation mode and input data which are defined by a set of instructions, said system comprising: a host computer for receiving, storing and transmitting said set of instructions defining the neural network and the neural network's input data; a neural engine coupled to said host computer for processing said instructions and for performing neural network computations; said neural engine including a control circuit comprising a microprocessor slice means for receiving, storing and transmitting said set of instructions received from said host computer defining the architecture and operation mode of said neural network; each of said instructions having three fields, including opcode, source register and destination register fields, said instructions including register load and store instructions for initializing and storage of data in the microprocessor slice means; said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the microprocessor slice means, wherein said system can be reconfigured to emulate multiple neural network architectures by changing said instructions; a plurality of multiply and accumulate modules coupled to said control circuit for performing multiply and accumulate functions of said neural network; and said multiply and accumulate modules each including a plurality of weight storage means for storing a set of interconnection weights and a plurality of multiplier and accumulate devices for generating the product of said input data times said interconnection weights and summing up all products for each neuron in said neural network, each multiply and accumulate device being coupled to one of said weight storage means, wherein said multiply and accumulate devices simultaneously perform multiply and accumulate operations during a single clock cycle of said system.
Claim 10
Independent Claim
293 words
A system for emulating and reconfiguring a neural network, said neural network to be emulated having architecture, operation mode and input data which are defined by a set of instructions, said system comprising: a host computer for receiving, storing and transmitting said set of instructions defining the neural network and the neural network's input data; a neural engine coupled to said host computer for processing said instructions and for performing neural network computations; said neural engine including a control circuit comprising a microprocessor slice means for receiving, storing and transmitting said set of instructions received from said host computer defining the architecture and operation mode of said neural network; each of said instructions having three fields, including opcode, source register and destination register fields, said instructions including register load and store instructions for initializing and storage of data in the microprocessor slice means; said set of instructions also including neural network instructions for causing the neural engine to process the neural network specified in the microprocessor slice means, wherein said system can be reconfigured to emulate multiple neural network architectures by changing said instructions; a plurality of multiply and accumulate modules coupled to said control circuit for performing multiply and accumulate functions of said neural network; and said multiply and accumulate modules each including a plurality of weight storage means for storing a set of interconnection weights and a plurality of multiplier and accumulate devices for generating the product of said input data times said interconnection weights and summing up all products for each neuron in said neural network, each multiply and accumulate device being coupled to one of said weight storage means, wherein said multiply and accumulate devices simultaneously perform multiply and accumulate operations during a single clock cycle of said system.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-06-05 | 1998-12-05 | 1999-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-06-05 | 2002-12-05 | 2003-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-06-05 | 2006-12-05 | 2007-06-06 | $7700.00 | Window Closed / Lapsed |