Real-time convolutional decoder with block synchronizing function

Claim 3

The method of claim 1, wherein the step of deciding whether block synchronization has been acquired is performed once per frame until block synchronization is indeed acquired, after which the step of deciding whether block synchronization has been lost is performed once per block until block synchronization is indeed lost.

Claim 4

The method of claim 1, comprising the further step of clearing all said metric values from said metric memory after said step of deciding whether block synchronization has been lost.

Claim 5

The method of claim 1, wherein said count is initially set to a value representing a negative number of frames, so that said one block of convolutionally decoded data will not be generated until at least one frame after the data of said one block has been received.

Claim 6

The method of claim 1, wherein said step of detecting errors comprises: deciding whether said one path matches the data received for said one block; and deciding whether the redundant code in said one block is correct.

Claim 7

The method of claim 1, wherein the step of detecting whether block synchronization has been lost comprises deciding whether errors have been detected in a certain number of consecutive blocks.

Claim 8

The method of claim 1, wherein said error information comprises a single error flag.

Claim 9

The method of claim 7, wherein said error flag is cleared to a certain value when said one path matches the data received for said one block and the redundant code in said one block is correct, and said error flag is otherwise set to a different value.

Claim 10

The method of claim 1, wherein said path information comprises pointers.

Claim 11

A Viterbi decoder for decoding data that have been block encoded with a redundant code in each block, then convolutionally coded, transmitted, and received in frames at a rate of at least two frames per block, comprising: an input buffer memory with a capacity of at least one frame, for storing said data as received; a path memory for storing path information describing possible convolutional code paths for at least one block of said data; a metric memory for storing metric values pertaining to said paths; a path processor coupled to store new path information in said path memory and update said metric memory as each frame is received; a counter coupled to count received frames; a path decoder coupled to wait until said counter reaches a value representing one block of frames, then select one path among said paths according to said metric values and generate one block of convolutionally decoded data by retracing said one path; an error detector coupled to detect errors according to the redundant code contained in said one block and the metric value stored in said metric memory pertaining to said one path, and generate error information; a synchronizing processor coupled to decide from said error information whether block synchronization has been acquired, decrement said counter if block synchronization has not been acquired, and clear said counter to a value representing zero frames if block synchronization has been acquired; a steady-state processor coupled to decide from said error information whether block synchronization has been lost, clear said counter to a value representing zero frames if block synchronization has not been lost, and set said counter to a value representing at most zero frames if block synchronization has been lost; and an output section coupled to output said one block and said error information.

Claim 12

A Viterbi decoder for decoding data that have been block encoded with a redundant code in each block, then convolutionally coded, transmitted, and received in frames at a rate of at least two frames per block, comprising: an input buffer memory with a capacity of at least one frame, for storing said data as received; a path memory for storing path information describing possible convolutional code paths for at least one block of said data; a metric memory for storing metric values pertaining to said paths; a path processor coupled to store new path information in said path memory and update said metric memory as each frame is received; a counter coupled to count received frames; a path decoder coupled to wait until said counter reaches a value representing one block of frames, then select one path among said paths according to said metric values and generate one block of convolutionally decoded data by retracing said one path; an error detector coupled to detect errors according to the redundant code contained in said one block and the metric value stored in said metric memory pertaining to said one path, and generate error information; a synchronizing processor coupled to decide from said error information whether block synchronization has been acquired, decrement said counter if block synchronization has not been acquired, and clear said counter to a value representing zero frames if block synchronization has been acquired; a steady-state processor coupled to decide from said error information whether block synchronization has been lost, clear said counter to a value representing zero frames if block synchronization has not been lost, and set said counter to a value representing at most zero frames if block synchronization has been lost; and an output section coupled to output said one block and said error information.

Claim 13

The decoder of claim 10 wherein, after deciding whether block synchronization has been lost, said steady-state processor clears all said metric values from said metric memory.

Claim 14

The decoder of claim 10, wherein said counter is initially set to a value representing a negative number of frames, so that said path decoder will not generate said one block of convolutionally decoded data until at least one frame after the data of said one block has been received.

Claim 15

The decoder of claim 10, wherein said error detector detects an error unless the redundant code in said one block is correct and said one path matches the data received for said one block.

Claim 16

The decoder of claim 10, wherein said steady-state processor detects loss of block synchronization if said error detector detects that errors are present in a certain number of consecutive blocks.

Claim 17

The decoder of claim 10, wherein said error information comprises a single error flag.

Claim 18

The decoder of claim 10, wherein said path information comprises pointers.