US5422312A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for forming metal via
Assignee: United Microelectronics Corp
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Filing: 1994-06-06
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Granted: 1995-06-06
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Expires: 2014-06-06
Abstract
Abstract A method of forming a metal via on a semiconductor substrate having a metal layer and a dielectric layer on the metal layer, which uses an intermediate mask layer as a mask in forming the metal via instead of using a photoresist as a mask. Therefore, the spin-on glass (SOG) layer in the dielectric layer is not exposed to plasma or solvent, thereby preventing the formation of polymers which cause poor step coverage and sometimes even contact failure in the metal via.
Inventors
- 👤 David Lee
- 👤 Water Lur
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 08:58
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10P; H10P50/00; H10P50/73; Y; Y10; Y10S; Y10S148/00; Y10S148/105
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
126 words
A method of forming a metal via of a semiconductor integrated circuit having a metal layer and at least one dielectric layer on said metal layer, the method comprising the steps of: (a) forming an intermediate mask layer on said at least one dielectric layer; (b) forming a photoresist layer on said intermediate mask layer, said photoresist layer having an opening at the predetermined position; (c) removing a portion of said intermediate mask layer through said opening; (d) wet etching a portion of said at least one dielectric layer using said intermediate mask layer as a mask; and (e) dry etching remaining portion of said at least one dielectric layer using said intermediate mask layer as a mask, said dry etching consuming said intermediate mask layer.
Claim 2
Independent Claim
126 words
A method of forming a metal via of a semiconductor integrated circuit having a metal layer and at least one dielectric layer on said metal layer, the method comprising the steps of: (a) forming an intermediate mask layer on said at least one dielectric layer; (b) forming a photoresist layer on said intermediate mask layer, said photoresist layer having an opening at the predetermined position; (c) removing a portion of said intermediate mask layer through said opening; (d) wet etching a portion of said at least one dielectric layer using said intermediate mask layer as a mask; and (e) dry etching remaining portion of said at least one dielectric layer using said intermediate mask layer as a mask, said dry etching consuming said intermediate mask layer.
Claim 3
Dependent Claim
29 words
The method of claim 1, further comprising a step of: (f) forming another metal layer on said at least one dielectric layer after said intermediate mask layer is consumed.
Claim 4
Dependent Claim
13 words
The method of claim 2, wherein said intermediate mask layer comprises titanium nitride.
Claim 5
Dependent Claim
13 words
The method of claim 2, wherein said intermediate mask layer comprises tantalum nitride.
Claim 6
Dependent Claim
13 words
The method of claim 1, wherein said intermediate mask layer comprises titanium nitride.
Claim 7
Dependent Claim
13 words
The method of claim 1, wherein said intermediate mask layer comprises tantalum nitride.
Claim 8
Independent Claim
135 words
A method of forming metal via of a semiconductor integrated circuit having a patterned metal layer, the method comprising the steps of: (a) forming a first dielectric layer on said metal layer; (b) forming a second dielectric layer on said first dielectric layer, said second dielectric layer including SOG; (c) forming a third dielectric layer on said second dielectric layer; (d) forming an intermediate mask layer on said third dielectric layer; (e) forming a photoresist layer on said intermediate mask layer, said photoresist layer having an opening at the predetermined position; (f) removing a portion of said intermediate mask layer through said opening; (g) removing said photoresist layer; and (h) dry etching said first, second and third dielectric layers using said intermediate mask layer as a mask, said dry etching consuming said intermediate mask layer.
Claim 9
Independent Claim
135 words
A method of forming metal via of a semiconductor integrated circuit having a patterned metal layer, the method comprising the steps of: (a) forming a first dielectric layer on said metal layer; (b) forming a second dielectric layer on said first dielectric layer, said second dielectric layer including SOG; (c) forming a third dielectric layer on said second dielectric layer; (d) forming an intermediate mask layer on said third dielectric layer; (e) forming a photoresist layer on said intermediate mask layer, said photoresist layer having an opening at the predetermined position; (f) removing a portion of said intermediate mask layer through said opening; (g) removing said photoresist layer; and (h) dry etching said first, second and third dielectric layers using said intermediate mask layer as a mask, said dry etching consuming said intermediate mask layer.
Claim 10
Dependent Claim
27 words
The method of claim 7, further comprising a step of: (i) forming another metal layer on said third dielectric layer after said intermediate mask layer is consumed.
Claim 11
Dependent Claim
13 words
The method of claim 7, wherein said intermediate mask layer comprises titanium nitride.
Claim 12
Dependent Claim
13 words
The method of claim 7, wherein said intermediate mask layer comprises tantalum nitride.
Claim 13
Dependent Claim
13 words
The method of claim 7, wherein said second dielectric layer comprises siloxane SOG.
References Cited (Backward Citations)
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