US5420536A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Linearized power amplifier
Assignee: Victoria University
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Filing: 1994-03-15
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Granted: 1995-05-30
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Expires: 2014-03-15
Abstract
Abstract A linearized power amplifier is provided which comprises a non-linear radio frequency (RF) power amplifier, a linearization circuit such as a Cartesian Feedback circuit, an RF feedback circuit; an IF feedback circuit; or a feedforward circuit, and a dynamic bias modulation circuit for modulating an operating voltage of the amplifier. The dynamic bias modulation means includes an envelope determining circuit, signal processing circuits in which predetermined data or a simplified transfer function determined from measured characteristics of the amplifier is stored and used to produce power bias and/or base or gate bias signals, and driver circuits for modulating the power supply voltage and/or base or gate bias voltage of the RF amplifier in response to the bias signals. The dynamic bias modulation may be used with a BJT-based, and FET-based or any other type of RF power amplifier. With the right combination of power supply and base or gate bias modulation the efficiency of the RF amplifier can be maximised for a given output power, and the combination of linearization means and high level power supply and/or base or gate bias modulation gives the benefits of improved spectral control and intermodulation distortion reduction coupled with high efficiency.
Inventors
- 👤 Michael Faulkner
- 👤 Mark A. Briffa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 15:54
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/36; H04L27/366; H04L27/367; H04L27/368; H03; H03C; H03C3/00; H03C3/38; H03C3/40; H03C3/406; H03C5/00; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0216; H03F1/0222; H03F1/0261; H03F1/32; H03F1/3223; H03F1/3241; H03F1/3247; H03F1/34; H03F1/345; H03F3/00; H03F3/20; H03F3/24; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3036; H03G3/3042; H03F2200/00; H03F2200/102; H03F2200/57; H03F2201/00; H03F2201/32; H03F2201/3233; H04B; H04B1/00; H04B1/02; H04B1/04; H04B2001/0408; H04B2001/0441; H04B2001/045
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
190 words
A linearized power amplifier circuit comprising: a non-linear radio frequency (RF) power amplifier for amplifying an input signal and producing an output signal corresponding thereto, said input signal having envelope properties, said non-linear amplifier exhibiting non-linear amplitude and phase characteristics and having at least one operating point input; dynamic bias modulation means for dynamically modulating the operation of said non-linear amplifier for efficient operation of said non-linear amplifier, said dynamic bias modulation means comprising, an input signal envelope determining means for obtaining an envelope signal from said input signal, mapping means for converting said envelope signal to at least one optimum operating voltage for said non-linear amplifier, and power driver means for applying said at least one operating voltage to said operating point input of said non-linear amplifier; and linearization means which is separate and distinct from said dynamic bias modulation means, said linearization means utilizing a signal representation in said circuit that does not result in bandwidth expansion for linearizing and correcting for the non-linear amplitude and phase characteristics of said non-linear amplifier and further for correcting for additional distortion and errors introduced by said dynamic bias modulation means.
Claim 2
Dependent Claim
190 words
A linearized power amplifier circuit comprising: a non-linear radio frequency (RF) power amplifier for amplifying an input signal and producing an output signal corresponding thereto, said input signal having envelope properties, said non-linear amplifier exhibiting non-linear amplitude and phase characteristics and having at least one operating point input; dynamic bias modulation means for dynamically modulating the operation of said non-linear amplifier for efficient operation of said non-linear amplifier, said dynamic bias modulation means comprising, an input signal envelope determining means for obtaining an envelope signal from said input signal, mapping means for converting said envelope signal to at least one optimum operating voltage for said non-linear amplifier, and power driver means for applying said at least one operating voltage to said operating point input of said non-linear amplifier; and linearization means which is separate and distinct from said dynamic bias modulation means, said linearization means utilizing a signal representation in said circuit that does not result in bandwidth expansion for linearizing and correcting for the non-linear amplitude and phase characteristics of said non-linear amplifier and further for correcting for additional distortion and errors introduced by said dynamic bias modulation means.
Claim 3
Dependent Claim
30 words
A linearized power amplifier circuit according to claim 1 wherein said non-linear amplifier has a pair of operating point inputs which comprise a power supply input and a bias port.
Claim 4
Dependent Claim
77 words
A linearized power amplifier circuit according to claim 2 wherein said mapping means of said dynamic bias modulation means converts said envelope signal to a power supply operating voltage and a bias port operating voltage, and said power driver means comprises a first power driver for applying said power supply operating voltage to said power supply input of said non-linear amplifier and a second power driver for applying said bias port operating voltage to said bias port.
Claim 5
Dependent Claim
40 words
A linearized power amplifier circuit according to claim 3 wherein said mapping means of said dynamic bias modulation means utilizes predetermined amplifier efficiency measurements which are obtained by finding optimum power supply and bias port operating voltages for best efficiency.
Claim 6
Dependent Claim
50 words
A linearized power amplifier circuit according to claim 2 wherein said non-linear amplifier comprises a bipolar junction transistor (BJT) having collector and base elements, and wherein said power supply input is coupled to the collector of said BJT, and said bias port is coupled to the base of said BJT.
Claim 7
Dependent Claim
50 words
A linearized power amplifier circuit according to claim 2 wherein said non-linear amplifier comprises a field effect transistor (FET) having drain and gate elements, and wherein said power supply input is coupled to the drain of said FET, and said bias port is coupled to the gate of said FET.
Claim 8
Dependent Claim
36 words
A linearized power amplifier circuit according to claim 2 wherein said dynamic bias modulation means applies said optimum operating voltage only to said power supply input and not to said bias port of said non-linear amplifier.
Claim 9
Dependent Claim
36 words
A linearized power amplifier circuit according to claim 2 wherein said dynamic bias modulation means applies said optimum operating voltage only to said bias port and not to the power supply input of said non-linear amplifier.
Claim 10
Dependent Claim
35 words
A linearized power amplifier circuit according to claim 1 wherein said dynamic bias modulation means includes a time delay means for delaying said input signal to improve the efficiency of said dynamic bias modulation means.
Claim 11
Dependent Claim
41 words
A linearized power amplifier circuit according to claim 1 wherein said mapping means of said dynamic bias modulation means comprises signal processing means which utilizes predetermined amplifier efficiency measurements to map envelope signals to said at least one optimum operating voltage.
Claim 12
Dependent Claim
41 words
A linearized power amplifier circuit according to claim 1 wherein said mapping means of said dynamic bias modulation means employs a simplified transfer function of predetermined amplifier efficiency measurements to map envelope signals to said at least one optimum operating voltage.
Claim 13
Dependent Claim
42 words
A linearized power amplifier according to claim 1 wherein said power driver means is formed and constructed for applying said at least one operating voltage to said operating point input of said non-linear amplifier in an efficient but not necessarily accurate manner.
Claim 14
Dependent Claim
20 words
A linearized power amplifier circuit according to claim 1 wherein said linearization means comprises of a Cartesian feedback linearization circuit.
Claim 15
Dependent Claim
19 words
A linearized power amplifier circuit according to claim 1 wherein said linearization means comprises of a RF feedback-linearization circuit.
Claim 16
Dependent Claim
22 words
A linearized power amplifier circuit according to claim 1 wherein said linearization means comprises of an intermediate frequency (IF) feedback linearization circuit.
Claim 17
Dependent Claim
19 words
A linearized power amplifier circuit according to claim 1 wherein said linearization means comprises of a feedforward linearization circuit.
Claim 18
Dependent Claim
63 words
A linearized power amplifier circuit according to claim 1 wherein said linearization means processes said input signal and includes a delay means for delaying said input signal being processed by said linearization means so it arrives at said non-linear amplifier in a manner which, when combined with said optimum operating point voltage provided by said dynamic bias modulation means, results in improved efficiency.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-05-29 | 1998-11-28 | 1999-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-29 | 2002-11-28 | 2003-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-29 | 2006-11-28 | 2007-05-30 | $7700.00 | Window Closed / Lapsed |