Packet disassembler for use in a control unit of an asynchronous switching system

Claim 2

A packet disassembler for disassembling a plurality of packets, each having an information part of a predetermined fixed information length and an identification part including an identifier indicative of a connection with other packets into a frame to be processed by an upper-level processor, comprising: a plurality of fixed-length buffers, each having an identical length and having a storage capacity equal to a multiple of said predetermined fixed information length; and management means for performing allocation control for allocating a newly input packet, one of said plurality of fixed-length buffers having an identifier identical to the identifier of the newly input packet when disassembling of previously input packets having an identifier identical to that of the newly input packet is not completed, and for performing allocation control for allocating the newly input packet to an empty one of said plurality of fixed-length buffers when the disassembling of the previously input packets having the identical identifier is completed or when no disassembling of packets having the identical identifier is carried out.

Claim 3

A packet disassembler as set forth in claim 1, wherein each of said plurality of fixed-length buffers has a length equal to or larger than that of said frame.

Claim 4

A packet disassembler as set forth in claim 1, further comprising another buffer for storing a frame buffer number of said fixed-length buffer where input packets were disassembled as the frame buffer number of an empty fixed-length buffer when said disassembling is completed and a series of the information parts in the packets are transmitted to said upper-level processor, and wherein said management means extracts the frame buffer number of an empty fixed-length buffer from said another buffer when an empty fixed-length buffer is necessary.

Claim 5

A packet disassembler as set forth in claim 1, wherein said management means includes: a buffer number table for designating a frame buffer number of one of said fixed-length buffers having the same identifier where the disassembly is being performed when it is determined that disassembling of input packets having the same connection identifier is not completed on the basis of said identifier of said input packets and position information indicative of positions of said input packets having the same identifier, and for designating a frame buffer number of an empty one of said plurality of fixed-length buffers when it is judged that the disassembling of said input packets having the same connection identifier is completed on the basis of said position information or when the disassembling of said input packets having the same identifier is not performed; and a management table for updating or newly setting a disassembling state of the fixed-length buffer having a frame buffer number received from said buffer number table based on said frame buffer number, for indicating an address within the fixed-length buffer in which the input packets are to be stored, and for informing said upper-level processor of the completion of the disassembling.

Claim 6

A packet disassembler as set forth in claim 4, wherein said position information includes segment type information (ST) and sequence number information (SN) in said input packets.

Claim 7

A packet disassembler as set forth in claim 5, further comprising detection means for comparing the current ST and SN of said input packet with the ST and SN of the previous packet having the same identifier as said input packet to detect an abnormality in the input packets; and means for discarding said input packet when said detection means detects abnormality.

Claim 8

A packet disassembler as set forth in claim 1, wherein said newly input packet is an ATM cell and said identifier is a connection identifier within a header of the ATM cell.

Claim 9

A packet disassembler as set forth in claim 7, wherein said identifier is a multiplexing identifier having the same identifier as the connection identifier within a header of the ATM cell.

Claim 10

A packet disassembler for disassembling a plurality of input packets each having an information part of a predetermined fixed information length and an identification part including an identifier indicative of a connection with other packets into a frame to be processed by an upper-level processor, comprising: separation means for separating each of said packets into the information part and the identification part; a plurality of fixed-length buffers each having an identical length and having a storage capacity equal to a multiple of said predetermined fixed information length; another buffer for storing a frame buffer number of said fixed-length buffer where the packets were disassembled as a frame buffer number of an empty fixed-length buffer when said disassembling is completed and a series of the information parts in the packets are transmitted to said upper-level processor; and management means for performing allocation control for allocating a newly input packet to one of said plurality of fixed-length buffers having an identifier identical to the identifier of the newly input packet when disassembling of previously input packets having an identifier identical to that of the newly input packet in the identification part separated by said separation means is not completed, and for performing allocation control for allocating the newly input packet with an empty one of said plurality of buffers when the disassembling of the previously input packets having the identical identifier is completed or when no disassembling of packets having the identical identifier is carried out.

Claim 11

A packet disassembler for disassembling a plurality of input packets each having an information part of a predetermined fixed information length and an identification part including an identifier indicative of a connection with other packets into a frame to be processed by an upper-level processor, comprising: separation means for separating each of said packets into the information part and the identification part; a plurality of fixed-length buffers each having an identical length and having a storage capacity equal to a multiple of said predetermined fixed information length; another buffer for storing a frame buffer number of said fixed-length buffer where the packets were disassembled as a frame buffer number of an empty fixed-length buffer when said disassembling is completed and a series of the information parts in the packets are transmitted to said upper-level processor; and management means for performing allocation control for allocating a newly input packet to one of said plurality of fixed-length buffers having an identifier identical to the identifier of the newly input packet when disassembling of previously input packets having an identifier identical to that of the newly input packet in the identification part separated by said separation means is not completed, and for performing allocation control for allocating the newly input packet with an empty one of said plurality of buffers when the disassembling of the previously input packets having the identical identifier is completed or when no disassembling of packets having the identical identifier is carried out.

Claim 12

A packet disassembler for disassembling a plurality of packets, each having an information part of a predetermined fixed information length and an identification part including an identifier indicative of connection with other packets so as to generate a frame to be processed by an upper-level processor, comprising: a plurality of fixed-length buffers having a length identical to the predetermined fixed information length; and management means for successively linking a predetermined number of vacant fixed-length buffers from which data was transmitted to the upper-level processor so as to generate a series of linked fixed-length buffers having an information length equal to a length of the predetermined fixed information length multiplied by the predetermined number, and for performing allocation control for allocating a newly input packet to the series of linked fixed-length buffers having identifiers identical to that of the newly input packet, the allocation control for the fixed-length buffers being performed based on an order of the linking when disassembling of previously input packets having an identifier identical with that of the newly input packet-is not completed, and for performing allocation control for allocating the newly input packet to the series of linked vacant fixed-length buffers, the allocation to a vacant fixed-length buffer of the series of linked fixed-length buffers being performed based on an order of the linking when the disassembling of the packets having the identical identifier is completed or when no disassembling of the packets having the identical identifier is carried out.

Claim 13

A packet disassembler for disassembling a plurality of packets, each having an information part of a predetermined fixed information length and an identification part including an identifier indicative of connection with other packets so as to generate a frame to be processed by an upper-level processor, comprising: a plurality of fixed-length buffers having a length identical to the predetermined fixed information length; and management means for successively linking a predetermined number of vacant fixed-length buffers from which data was transmitted to the upper-level processor so as to generate a series of linked fixed-length buffers having an information length equal to a length of the predetermined fixed information length multiplied by the predetermined number, and for performing allocation control for allocating a newly input packet to the series of linked fixed-length buffers having identifiers identical to that of the newly input packet, the allocation control for the fixed-length buffers being performed based on an order of the linking when disassembling of previously input packets having an identifier identical with that of the newly input packet-is not completed, and for performing allocation control for allocating the newly input packet to the series of linked vacant fixed-length buffers, the allocation to a vacant fixed-length buffer of the series of linked fixed-length buffers being performed based on an order of the linking when the disassembling of the packets having the identical identifier is completed or when no disassembling of the packets having the identical identifier is carried out.