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US5409568A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating a microelectronic vacuum triode structure

Assignee: Individual
•
Filing: 1992-08-04
•
Granted: 1995-04-25
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Expires: 2012-08-04
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Abstract

Abstract An improved vacuum microelectronic device comprised of a first polysilicon layer-having hornlike protrusions forming the emitter of the device, a first insulating layer separating the first polysilicon layer from a second polysilicon layer forming the grid of the device; a second insulating layer separating the second and third polysilicon layers. A portion of the first insulating layer, the second polysilicon layer, and second insulating layers are removed to form a grid aperture region positioned directly above the hornlike protrusion of the emitter. A cavity exists between the grid aperture region and a third polysilicon layer. The cavity is evacuated to form the vacuum region of the device.

Inventors

  • 👤 Gregory S. Vasche

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 13:49
CPC Classifications
H; H01; H01J; H01J9/00; H01J9/02; H01J21/00; H01J21/02; H01J21/06; H01J21/10; H01J21/105

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 131 words
A method for fabricating a vacuum microelectronic device comprising the steps of: forming a first conductive layer having an edge, said first conductive layer being capable of oxide growth; oxidizing said first conductive layer to form a protrusion on said edge of said first conductive layer; forming a first insulating layer on said first conductive layer; forming a second conductive layer on said first insulating layer; forming a second insulating layer on said second conductive layer; forming an opening in said first insulating layer, said second conductive layer, said second insulating layer, and said first insulating layer to expose said protrusion; forming a third insulating layer; forming a third conductive layer; and selectively removing said third insulating layer to form a cavity region between said protrusion and said third conductive layer.
Claim 2
Independent Claim 131 words
A method for fabricating a vacuum microelectronic device comprising the steps of: forming a first conductive layer having an edge, said first conductive layer being capable of oxide growth; oxidizing said first conductive layer to form a protrusion on said edge of said first conductive layer; forming a first insulating layer on said first conductive layer; forming a second conductive layer on said first insulating layer; forming a second insulating layer on said second conductive layer; forming an opening in said first insulating layer, said second conductive layer, said second insulating layer, and said first insulating layer to expose said protrusion; forming a third insulating layer; forming a third conductive layer; and selectively removing said third insulating layer to form a cavity region between said protrusion and said third conductive layer.
Claim 3
Dependent Claim 22 words
The method recited in claim 1 further comprising the step of evenly distributing dopants into said first, second and third conductive layer.
Claim 4
Dependent Claim 28 words
The method recited in claim 1 further comprising the step of depositing a metal layer to the surface of said conductive layer and applying heat to form silicide.
Claim 5
Dependent Claim 26 words
The method recited in claim 1 wherein distance between a said protrusion and said third conductive layer is dependent on the thickness of said sacrificial oxide.
Claim 6
Dependent Claim 17 words
The method as recited in claim 1 wherein said first conductive layer is formed on a substrate.
Claim 7
Dependent Claim 21 words
The method as recited in claim 1 wherein said opening in said second conductive layer is self aligned with said protrusion.
Claim 8
Dependent Claim 19 words
The method as recited in claim 1 wherein said third conductive layer is self aligned with said cavity region.
Claim 9
Independent Claim 86 words
A method for fabricating a vacuum microelectronic device comprising the steps of: forming a first conductive layer having an edge, said first conductive layer being capable of oxide growth; oxidizing said first conductive layer to form a protrusion on said edge of said first conductive layer; forming a first insulating layer on said first conductive layer; forming a second conductive layer on said first insulating layer; and selectively removing said first insulating layer to form a cavity region between said protrusion and said second conductive layer.
Claim 10
Independent Claim 86 words
A method for fabricating a vacuum microelectronic device comprising the steps of: forming a first conductive layer having an edge, said first conductive layer being capable of oxide growth; oxidizing said first conductive layer to form a protrusion on said edge of said first conductive layer; forming a first insulating layer on said first conductive layer; forming a second conductive layer on said first insulating layer; and selectively removing said first insulating layer to form a cavity region between said protrusion and said second conductive layer.
Claim 11
Dependent Claim 21 words
The method recited in claim 8 further comprising the step of evenly distributing dopants into said first and second conductive layer.
Claim 12
Dependent Claim 29 words
The method recited in claim 8 further comprising the step of depositing a metal layer to the surface of said second conductive layer and applying heat to form silicide.
Claim 13
Dependent Claim 27 words
The method recited in claim 8 wherein distance between a said protrusion and said second conductive layer is dependent on the thickness of said first insulating layer.
Claim 14
Dependent Claim 17 words
The method as recited in claim 8 wherein said first conductive layer is formed on a substrate.
Claim 15
Dependent Claim 19 words
The method as recited in claim 8 wherein said second conductive layer is self aligned with said cavity region.

References Cited (Backward Citations)

US3789471A Cited
US4307507A Cited
US4827177A Cited
US4721885A Cited
US5023694A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-04-24 1998-10-24 1999-04-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-04-24 2002-10-24 2003-04-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-04-24 2006-10-24 2007-04-25 $7700.00 Window Closed / Lapsed

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