US5406520A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Universal modular memory
Assignee: Texas Instruments Inc
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Filing: 1993-09-20
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Granted: 1995-04-11
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Expires: 2013-09-20
Abstract
Abstract In accordance with one embodiment of the invention, an integrated circuit memory capable of receiving address signals has a plurality of array modules. Each array module has a plurality of memory cells arranged in rows and columns and has a means for addressing the rows and columns of the array modules in response to the address signals. The integrated memory includes a circuit for de-coupling an input address signal from array modules and for coupling of a fixed address signal to the array modules, allowing the conversion of the integrated circuit memory to a universal modular memory.
Inventors
- 👤 Cheng H. Tay
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 10:43
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/12; G11C29/18; G11C29/26; G11C29/28; G11C29/44; G11C8/00; G11C8/12
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
171 words
Conversion circuitry for converting an integrated circuit memory capable of receiving a total number of address signals to a universal modular memory for receiving at least one less said total number of address signals, said integrated circuit before conversion including a plurality of array modules, each array module having a plurality of memory cells arranged in rows and columns, said total number of address signals providing approximately one address for each of said memory cells in said integrated circuit memory; and including decoder circuitry coupled to receive said total number of address signals, said decoder circuitry having outputs routing data corresponding to each said cell of each said array module in response to coupling of each of said total number of address signals to said decoder circuitry; said conversion circuitry comprising: first altering circuitry for permanently de-coupling at least one of said total number of address signals from said decoder circuitry; second altering circuitry for applying a deactivating signal to said decoder circuitry to deactivate permanently at least one said module.
Claim 2
Dependent Claim
171 words
Conversion circuitry for converting an integrated circuit memory capable of receiving a total number of address signals to a universal modular memory for receiving at least one less said total number of address signals, said integrated circuit before conversion including a plurality of array modules, each array module having a plurality of memory cells arranged in rows and columns, said total number of address signals providing approximately one address for each of said memory cells in said integrated circuit memory; and including decoder circuitry coupled to receive said total number of address signals, said decoder circuitry having outputs routing data corresponding to each said cell of each said array module in response to coupling of each of said total number of address signals to said decoder circuitry; said conversion circuitry comprising: first altering circuitry for permanently de-coupling at least one of said total number of address signals from said decoder circuitry; second altering circuitry for applying a deactivating signal to said decoder circuitry to deactivate permanently at least one said module.
Claim 3
Dependent Claim
17 words
The integrated circuit memory of claim 1, wherein at least one of said array modules is defective.
Claim 4
Dependent Claim
28 words
The integrated circuit memory of claim 1, wherein at least one of said array modules is defective and wherein said deactivating signal permanently deactivates said defective array module.
Claim 5
Dependent Claim
24 words
The integrated circuit memory of claim 1, wherein at least one of said first altering circuitry and said second altering circuitry includes a fuse.
Claim 6
Dependent Claim
51 words
The integrated circuit memory of claim 1, further including third altering circuitry for de-coupling permanently a second of said total number of address signals from one input to said decoder circuitry and for re-coupling said second of said total number of address signal to a second input of said decoder circuitry.
Claim 7
Dependent Claim
33 words
The integrated circuit memory of claim 1, further including third altering circuitry for re-routing a second said address signal to said decoder circuitry, wherein said third altering circuitry includes a pair of fuses.
Claim 8
Dependent Claim
19 words
The integrated circuit memory of claim 1, wherein said decoder circuitry includes a row decoder and a column decoder.
Claim 9
Dependent Claim
16 words
The integrated circuit memory of claim 1, wherein said integrated memory is a dynamic random-access memory.
Claim 10
Dependent Claim
16 words
The integrated circuit memory of claim 1, wherein said address signals are furnished by a microprocessor.
Claim 11
Dependent Claim
27 words
The integrated circuit memory of claim 1, wherein at least one of said array modules includes at least one of a redundant row or column of cells.
Claim 12
Independent Claim
168 words
A method for converting a memory having a number of array modules to a universal modular memory having a lesser said number of operating array modules, each array module having a plurality of memory cells arranged in rows and columns, said memory capable of receiving prior to conversion a total number of address signals providing approximately one address for each of said memory cells, said memory receiving after conversion at least one less than said total number of address signals, said memory including decoder circuitry coupled to receive said address signals, said decoder circuitry having outputs routing data corresponding to each said cell of each said array module in response to said address signals, said method comprising: de-coupling permanently at least one less than said total number of said address signals from said decoder circuitry; applying a deactivating signal to said decoder circuitry to deactivate permanently at least one said array module; and if necessary, re-routing one of said total number of address signals to said decoder circuitry.
Claim 13
Independent Claim
168 words
A method for converting a memory having a number of array modules to a universal modular memory having a lesser said number of operating array modules, each array module having a plurality of memory cells arranged in rows and columns, said memory capable of receiving prior to conversion a total number of address signals providing approximately one address for each of said memory cells, said memory receiving after conversion at least one less than said total number of address signals, said memory including decoder circuitry coupled to receive said address signals, said decoder circuitry having outputs routing data corresponding to each said cell of each said array module in response to said address signals, said method comprising: de-coupling permanently at least one less than said total number of said address signals from said decoder circuitry; applying a deactivating signal to said decoder circuitry to deactivate permanently at least one said array module; and if necessary, re-routing one of said total number of address signals to said decoder circuitry.
Claim 14
Dependent Claim
16 words
The method of claim 11, wherein said integrated circuit memory is a dynamic random access memory.
Claim 15
Dependent Claim
14 words
The method of claim 11, wherein said address signals are furnished by a microprocessor.
Claim 16
Dependent Claim
15 words
The method of claim 11, wherein at least one of said array modules is defective.
Claim 17
Dependent Claim
25 words
The method of claim 11, wherein at least one of said array modules is defective and wherein said deactivating signal inactivates said defective array module.
Claim 18
Dependent Claim
21 words
The method of claim 11, wherein said re-routing is performed by using a laser beam to open-circuit at least one fuse.
Claim 19
Dependent Claim
21 words
The method of claim 11, wherein said de-coupling is performed by using a laser beam to open-circuit at least one fuse.
Claim 20
Dependent Claim
28 words
The method of claim 11, wherein said applying a deactivating signal to said decoder circuitry is performed by using a laser beam to open-circuit at least one fuse.
References Cited (Backward Citations)
US4604730A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-04-10 | 1998-10-10 | 1999-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-04-10 | 2002-10-10 | 2003-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-04-10 | 2006-10-10 | 2007-04-11 | $7700.00 | Window Closed / Lapsed |