US5406225A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bias control circuit for radio-frequency power amplifier
Assignee: Sony Corp
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Filing: 1993-11-30
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Granted: 1995-04-11
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Expires: 2013-11-30
Abstract
Abstract A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of an intermittent radio-frequency signal. The control circuit includes a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supplied to the power amplifying element, and for setting the idle current of the power amplifying element to a predetermined value. The control circuit further includes a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supplied to the power amplifying element. The output voltage of the sample and hold circuit is supplied as a bias voltage to the power amplifying element during the subsequent time period of supply of the radio-frequency signal to the power amplifying element, whereby the idle current of the power amplifying element is stabilized despite any temperature fluctuation.
Inventors
- 👤 Sachio Iida
- 👤 Norio Shimo
- 👤 Hideaki Sato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 07:52
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/02; H03F1/0205; H03F1/0211; H03F1/0244; H03F1/30; H03F1/301; H03F2200/00; H03F2200/481; H03F2200/483
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
191 words
A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of a radio-frequency signal supplied thereto intermittently at a predetermined repetition cycle, said bias control circuit comprising: a bias voltage setting circuit for supplying a variable bias voltage to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element in order to set the idle current of said power amplifying element to a predetermined value; a circuit for feeding back the output current in said power amplifying element to control said bias voltage setting circuit; a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element; and means for disconnecting the bias voltage setting circuit from the power amplifying element and supplying the output voltage of said sample and hold circuit as a constant bias voltage to said power amplifying element during a subsequent time period in which said radio-frequency signal is supplied to said power amplifying element.
Claim 2
Dependent Claim
191 words
A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of a radio-frequency signal supplied thereto intermittently at a predetermined repetition cycle, said bias control circuit comprising: a bias voltage setting circuit for supplying a variable bias voltage to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element in order to set the idle current of said power amplifying element to a predetermined value; a circuit for feeding back the output current in said power amplifying element to control said bias voltage setting circuit; a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element; and means for disconnecting the bias voltage setting circuit from the power amplifying element and supplying the output voltage of said sample and hold circuit as a constant bias voltage to said power amplifying element during a subsequent time period in which said radio-frequency signal is supplied to said power amplifying element.
Claim 3
Dependent Claim
52 words
The bias control circuit according to claim 1, wherein said sample and hold circuit comprises: an A/D converter for executing analog-to-digital conversion of an input voltage; a memory for holding the output data of said A/D converter; and a D/A converter for executing digital-to-analog conversion of the data held in said memory.
Claim 4
Dependent Claim
216 words
A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of a radio-frequency signal supplied thereto intermittently at a predetermined repetition cycle, said bias control circuit comprising: a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element, and setting the idle current of said power amplifying element to a predetermined value; a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element; wherein said bias voltage setting circuit incudes: a temperature compensating diode; a transistor supplied with the bias voltage including the terminal voltage of said diode; and a circuit for feeding back the output current in said power amplifying element to said transistor; wherein the output voltage of said transistor is supplied to said sample and hold circuit; and wherein the output voltage of said sample and hold circuit is supplied as a bias voltage to said power amplifying element during a subsequent time period in which said radio-frequency signal is supplied to said power amplifying element.
Claim 5
Dependent Claim
216 words
A bias control circuit for a radio-frequency power amplifier which performs linear power amplification of a radio-frequency signal supplied thereto intermittently at a predetermined repetition cycle, said bias control circuit comprising: a bias voltage setting circuit for supplying a bias voltage of a predetermined value to a power amplifying element during a time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element, and setting the idle current of said power amplifying element to a predetermined value; a sample and hold circuit for sampling and holding the bias voltage during the time period in which substantially none of the radio-frequency signal is supposed to be supplied to said power amplifying element; wherein said bias voltage setting circuit incudes: a temperature compensating diode; a transistor supplied with the bias voltage including the terminal voltage of said diode; and a circuit for feeding back the output current in said power amplifying element to said transistor; wherein the output voltage of said transistor is supplied to said sample and hold circuit; and wherein the output voltage of said sample and hold circuit is supplied as a bias voltage to said power amplifying element during a subsequent time period in which said radio-frequency signal is supplied to said power amplifying element.
Claim 6
Dependent Claim
37 words
The bias control circuit according to claim 3, wherein a voltage from a power source is supplied to said power amplifying element during the time period of supply of said radio-frequency signal regardless of said feedback circuit.
Claim 7
Dependent Claim
52 words
The bias control circuit according to claim 3, wherein said sample and hold circuit comprises: an A/D converter for executing analog-to-digital conversion of an input voltage; a memory for holding the output data of said A/D converter; and a D/A converter for executing digital-to-analog conversion of the data held in said memory.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-04-10 | 1998-10-10 | 1999-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-04-10 | 2002-10-10 | 2003-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-04-10 | 2006-10-10 | 2007-04-11 | $7700.00 | Window Closed / Lapsed |