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US5406199A Expired / Lapsed US ⏱️ 0.0 years remaining

Test fixture carrying a channel card for logic level translation

Assignee: AT&T Inc
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Filing: 1993-07-28
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Granted: 1995-04-11
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Expires: 2013-07-28
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Abstract

Abstract A test fixture (14) for coupling a circuit board (12) to an automatic testing machine (13) includes a translator board for coupling each of a plurality of test pads (26) on the board to a separate one of a plurality connecting members (22) arranged in spaced-apart rows. Each row of connecting members is coupled via a paddle card (36) and a channel card (44) to a separate channel of the testing machine (13). In accordance with the invention, a paddle card (36') containing circuitry (52') for signal logic level translation may be substituted for one of the paddle cards (36) when it is necessary to translate the logic level of certain signals passing between the testing machine (13) and the circuit board (12).

Inventors

  • 👤 Nimish K. Shah

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:30
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/2801; G01R31/2806; G01R31/2808

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 210 words
A system for testing a board under test comprising: a testing machine having a plurality of channels, each channel supplying test signals to, and receiving test responses from, the board under test; a test fixture having a first plurality of connecting members on a first surface arrayed for connection to the board under test so as to pass test signals thereto and to receive responses therefrom and a second plurality of connecting members arrayed in a plurality of spaced arrayed rows on second, opposed surface, each of the first connecting members electrically coupled to a separate one of the second connecting members; a plurality of channel cards, each coupled to a separate one of the channels of the testing machine for providing an electrical connection to said channel to facilitate the passage of test signals therefrom and the passage of test responses thereto; and a plurality of paddle cards, each providing an electrical connection between a separate one of the second connecting members of the test fixture and a separate one of the channel cards, Wherein the improvement comprises: at least one of the paddle cards contains at least one circuit for electronically translating responses received from the circuit board from a first logic level to a second logic level.
Claim 2
Independent Claim 210 words
A system for testing a board under test comprising: a testing machine having a plurality of channels, each channel supplying test signals to, and receiving test responses from, the board under test; a test fixture having a first plurality of connecting members on a first surface arrayed for connection to the board under test so as to pass test signals thereto and to receive responses therefrom and a second plurality of connecting members arrayed in a plurality of spaced arrayed rows on second, opposed surface, each of the first connecting members electrically coupled to a separate one of the second connecting members; a plurality of channel cards, each coupled to a separate one of the channels of the testing machine for providing an electrical connection to said channel to facilitate the passage of test signals therefrom and the passage of test responses thereto; and a plurality of paddle cards, each providing an electrical connection between a separate one of the second connecting members of the test fixture and a separate one of the channel cards, Wherein the improvement comprises: at least one of the paddle cards contains at least one circuit for electronically translating responses received from the circuit board from a first logic level to a second logic level.
Claim 3
Dependent Claim 18 words
The apparatus according to claim 1 wherein each circuit carried by the paddle card comprises a line driver.
Claim 4
Dependent Claim 34 words
The apparatus according to claim 2 wherein each line driver circuit is operative to convert a signal at TTL level to ECL level and to convert a signal at ECL level to TTL level.
Claim 5
Dependent Claim 34 words
The apparatus according to claim 2 wherein each line driver circuit is operative to convert a signal at TTL level to ECL level and to convert a signal at CMOS level to TTL level.
Claim 6
Dependent Claim 34 words
The apparatus according to claim 2 wherein each line driver circuit is operative to convert a signal at TTL level to BTL level and to convert a signal at BTL level to TTL level.

References Cited (Backward Citations)

US4746855A Cited
US5103168A Cited
US5101151A Cited
US5124638A Cited
US5216361A Cited
US5262716A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-04-10 1998-10-10 1999-04-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-04-10 2002-10-10 2003-04-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-04-10 2006-10-10 2007-04-11 $7700.00 Window Closed / Lapsed

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