US5404138A
Expired / Lapsed
US
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Apparatus for decoding variable length codes
Assignee: Agency for Defense Development
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Filing: 1993-10-26
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Granted: 1995-04-04
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Expires: 2013-10-26
Abstract
Abstract An apparatus for decoding variable length codes utilizing a parallel processing based on a code classification wherein an address determining logic receives output data from a barrel shifter, determines addresses by groups according to the received data, classifies and designates addresses of a decoder look-up table by groups according to the addresses determined by groups. As a result, a high processing speed can be obtained, over the conventional serial processing system. Moreover, no code deformation is required as in Lukacs system. The memory capacity of the decoder look-up table can be reduced, as compared with the conventional parallel processing method. In addition, the present invention can be applied to decoding of all variable length codes having a prefix structure.
Inventors
- 👤 Seong Dae Kim
- 👤 Yi Han Kim
- 👤 Sang Zee Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:12
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/40; H03M7/42; H03M7/425; H03M13/00; H03M13/65; H03M13/6502; H03M13/6505; H03M13/6561
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
161 words
An apparatus for decoding variable length codes comprising: an input buffer for receiving input data and temporarily storing it; a barrel shifter for receiving output data from said input buffer and shifting it; an address determing logic comprising plural adders for receiving said output data of barrel shifter and outputting address signals of classified groups; an address mapping logic for logic-combining said output data of the barrel shifter and outputting the resultant values as control signals; and a multiplexor for selecting and outputtting one of said address signals respectively outputted from said adders according to said control signals of the address mapping logic; a decoder look-up table having addresses classified into a plurality of groups, one of which is designated by an address signal from said address determining logic indicative of said determined addresses by groups, and outputting code lengths and decoding values corresponding to respective addresses designated; and a control unit for controlling the input buffer and the barrel shifter.
Claim 2
Independent Claim
161 words
An apparatus for decoding variable length codes comprising: an input buffer for receiving input data and temporarily storing it; a barrel shifter for receiving output data from said input buffer and shifting it; an address determing logic comprising plural adders for receiving said output data of barrel shifter and outputting address signals of classified groups; an address mapping logic for logic-combining said output data of the barrel shifter and outputting the resultant values as control signals; and a multiplexor for selecting and outputtting one of said address signals respectively outputted from said adders according to said control signals of the address mapping logic; a decoder look-up table having addresses classified into a plurality of groups, one of which is designated by an address signal from said address determining logic indicative of said determined addresses by groups, and outputting code lengths and decoding values corresponding to respective addresses designated; and a control unit for controlling the input buffer and the barrel shifter.
Claim 3
Dependent Claim
44 words
An apparatus in accordance with claim 1, wherein said adders are adapted to add said output data of said barrel shifter respectively to ground level, a first address and a second address and outputting the resultant values respectively as address signals of plural groups.
Claim 4
Dependent Claim
32 words
An apparatus in accordance with claim 1, wherein said address mapping logic comprises NOR gates for NORing the output data of the barrel shifter and outputting the resultant values as control signals.
Claim 5
Dependent Claim
16 words
An apparatus in accordance with claim 1 wherein said decoder look-up table has three address groups.
References Cited (Backward Citations)
US5173695A
Cited
US5233348A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-04-03 | 1998-10-03 | 1999-04-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-04-03 | 2002-10-03 | 2003-04-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-04-03 | 2006-10-03 | 2007-04-04 | $7700.00 | Window Closed / Lapsed |