US5398199A
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Many-valued logic processor for data query systems
Assignee: Individual
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Filing: 1992-03-04
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Granted: 1995-03-14
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Expires: 2012-03-04
Abstract
Abstract This data query apparatus consists of an application software and a circuitry for the processing of the data selection condition of the user query embodied in a host data base management system or information retrieval system. The application software translates the selection condition into the standard form which the circuitry can process. From the host system, and for each data record to be analyzed, the circuit apparatus receives the logical values taken on by the atomic conditions of the query and returns the logical value that the global selection condition takes on. This system allows the user to query the data on the basis of any truth-valued logic set up an arbitrary number of logical values, within the limits fixed by the system developer.
Inventors
- 👤 Ezio Lefons
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 18:48
CPC Classifications
G; G06; G06F; G06F16/00; G06F16/20; G06F16/24; G06F16/245; G06F16/2458; G06F16/2468
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
224 words
A digital information processing system for solving many-valued logic equations comprising: circuitry means for supplying a first plurality of input strings V and a second plurality of groups of input strings C; a many-valued logic processor for processing said sequences of many-valued input signals encoded by V strings on the basis of sequences of many-valued input operations encoded by said groups of C strings, and producing sequences of output signals representing U strings, a selected group of said U strings producing a group of binary signals which is the plural-bit code of a many-valued truth value, by carrying out selected many-valued logical operations on said input many-valued truth values (or V strings); parallel registers having plural-bit storage locations for storing sequences of input signals representing said second plurality of C strings, sequences of input signals representing said first plurality of V strings, and sequences of output signals representing said output U strings; circuitry connecting said many-valued logic processor with said parallel registers plural-bit storage locations for storing sequences of output strings U produced by the many-valued logic processor; and, output processing means for processing a group of selected U strings stored in said parallel registers plural-bit storage locations and producing, for each selected string U, a predetermined binary signal when the bits of said selected string U are all set to a predetermined value.
Claim 2
Dependent Claim
224 words
A digital information processing system for solving many-valued logic equations comprising: circuitry means for supplying a first plurality of input strings V and a second plurality of groups of input strings C; a many-valued logic processor for processing said sequences of many-valued input signals encoded by V strings on the basis of sequences of many-valued input operations encoded by said groups of C strings, and producing sequences of output signals representing U strings, a selected group of said U strings producing a group of binary signals which is the plural-bit code of a many-valued truth value, by carrying out selected many-valued logical operations on said input many-valued truth values (or V strings); parallel registers having plural-bit storage locations for storing sequences of input signals representing said second plurality of C strings, sequences of input signals representing said first plurality of V strings, and sequences of output signals representing said output U strings; circuitry connecting said many-valued logic processor with said parallel registers plural-bit storage locations for storing sequences of output strings U produced by the many-valued logic processor; and, output processing means for processing a group of selected U strings stored in said parallel registers plural-bit storage locations and producing, for each selected string U, a predetermined binary signal when the bits of said selected string U are all set to a predetermined value.
Claim 3
Dependent Claim
141 words
A digital information system as defined in clam 1, wherein: the many-valued processor executes n arbitrary many-valued logic operations, where each of the n truth values of a logic operation is represented by binary code using n-1 bits; and each sequence of many-valued input values is represented by n-1 strings V; each sequence of many-valued input operations on said sequence of many-valued input values is represented by n strings C; and, the many-valued logic processor provides processing of N-valued logics whose N truth values are represented by binary code using N-1 bits and is realized in accordance with the circuit EVAL consisting of a plurality of b-circuits of either type AX, type AE, type OE or type OX and each b-circuit produces a plurality of sequences of output signals or U strings to be selectively processed by said output processing means.
Claim 4
Dependent Claim
141 words
A digital information system as defined in clam 1, wherein: the many-valued processor executes n arbitrary many-valued logic operations, where each of the n truth values of a logic operation is represented by binary code using n-1 bits; and each sequence of many-valued input values is represented by n-1 strings V; each sequence of many-valued input operations on said sequence of many-valued input values is represented by n strings C; and, the many-valued logic processor provides processing of N-valued logics whose N truth values are represented by binary code using N-1 bits and is realized in accordance with the circuit EVAL consisting of a plurality of b-circuits of either type AX, type AE, type OE or type OX and each b-circuit produces a plurality of sequences of output signals or U strings to be selectively processed by said output processing means.
Claim 5
Dependent Claim
156 words
A digital information system having a many-valued logic processor as defined in claim 1, wherein: the many-valued processor provides the processing of n arbitrary many-valued logic operations where each of n truth values of said logic operation is represented by a binary code using up to n bits; each sequence of many-valued input values is represented using up to n strings V; each sequence of many-valued input operations on said sequence of input many-valued values is represented by n strings C; and, the many-valued logic processor for processing N-valued logic functions, whose truth values are represented by a binary code using up to N bits, is realized in accordance with the generalized circuit EVAL consisting of a plurality of generalized b-circuits of either type AX, type AE, type OE or type OX and each generalized b-circuit produces a plurality of sequences of output signals or U strings to be selectively processed by said output processing means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-13 | 1998-09-12 | 1999-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-13 | 2002-09-12 | 2003-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-13 | 2006-09-12 | 2007-03-14 | $7700.00 | Window Closed / Lapsed |