US5397944A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dense offset calibration circuitry and method
Assignee: Cirrus Logic Inc
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Filing: 1993-04-09
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Granted: 1995-03-14
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Expires: 2013-04-09
Abstract
Abstract An audio mixer circuit on an integrated circuit chip performs a calibration operation on power up which calibrates out most of the offset voltages of the operational amplifiers used in the mixer. The calibration logic includes a shared calibrate circuit which provides timing signals to each operational amplifier and its associated calibration circuitry. The calibration operation is performed by digitally controlling and changing the bias current into each of the operational amplifiers until the offset voltage is compensated. A class A flip-flop circuit is used in the digital counter of the calibration circuitry to drive a current digital-to-analog converter.
Inventors
- 👤 Timothy J. DuPuis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 20:30
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/303; H03F1/304
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
131 words
A method for compensating for the offset voltage of a plurality of operational amplifiers comprising the steps of: a) providing a calibrate signal from a shared calibrate circuit to couple both inputs of each of the operational amplifiers to a reference voltage; b) providing control signals from said shared calibrate circuit to a plurality of calibration circuits, each coupled to one of the operational amplifiers in order to inject a bias current into at least one node of each of the operational amplifiers such that the offset voltages of the operational amplifiers are changed as a result of said injected current into said at least one node; and c) repeating step b) for different current values injected in a stepwise manner until an output of each of the operational amplifiers changes.
Claim 2
Independent Claim
131 words
A method for compensating for the offset voltage of a plurality of operational amplifiers comprising the steps of: a) providing a calibrate signal from a shared calibrate circuit to couple both inputs of each of the operational amplifiers to a reference voltage; b) providing control signals from said shared calibrate circuit to a plurality of calibration circuits, each coupled to one of the operational amplifiers in order to inject a bias current into at least one node of each of the operational amplifiers such that the offset voltages of the operational amplifiers are changed as a result of said injected current into said at least one node; and c) repeating step b) for different current values injected in a stepwise manner until an output of each of the operational amplifiers changes.
Claim 3
Dependent Claim
107 words
The method set forth in claim 1 wherein the at least one node is a first node, and further including the additional step of: a) if the output of an operational amplifier does not change for currents injected into said first node, repeating steps b) and c) except that current is injected into a second node of said operational amplifier, wherein the offset voltage of the operational amplifiers is changed as a result of said injected current into said second node, the change in the offset voltage being in a direction complementary to the change in the offset voltage resulting from current injected into said first node.
Claim 4
Dependent Claim
24 words
The method set forth in claim 2 wherein the current injected into said first node and said second node is stepped maximum to minimum.
Claim 5
Dependent Claim
147 words
Apparatus for compensating for the offset voltage of a plurality of operational amplifiers comprising: a) a shared calibrate circuit having a calibrate signal output coupled to each of the operational amplifiers, each of the operational amplifiers coupling both inputs to a reference voltage in response to receiving said calibrate signal; b) a plurality of calibration circuits coupled to said shared calibrate circuit and to one of said plurality of operational amplifiers, each of the calibration circuits, in response to a control signal from said shared calibrate circuit, injecting a bias current into at least one node of an operational amplifier such that the offset voltages of the operational amplifiers are changed as a result of said injected current into said at least one node; and c) wherein the bias current injected is changed in a stepwise manner until an output of each of the operational amplifiers changes.
Claim 6
Dependent Claim
147 words
Apparatus for compensating for the offset voltage of a plurality of operational amplifiers comprising: a) a shared calibrate circuit having a calibrate signal output coupled to each of the operational amplifiers, each of the operational amplifiers coupling both inputs to a reference voltage in response to receiving said calibrate signal; b) a plurality of calibration circuits coupled to said shared calibrate circuit and to one of said plurality of operational amplifiers, each of the calibration circuits, in response to a control signal from said shared calibrate circuit, injecting a bias current into at least one node of an operational amplifier such that the offset voltages of the operational amplifiers are changed as a result of said injected current into said at least one node; and c) wherein the bias current injected is changed in a stepwise manner until an output of each of the operational amplifiers changes.
Claim 7
Dependent Claim
100 words
The apparatus set forth in claim 4 wherein the at least one node is a first node, and wherein if the output of an operational amplifier does not change for currents injected into said first node, the currents injected from said calibration circuits is injected into a second node of said operational amplifiers, wherein the offset voltage of the operational amplifiers is changed as a result of said injected current into said second node, the change in the offset voltage being in a direction complementary to the change in the offset voltage resulting from current injected into said first node.
Claim 8
Dependent Claim
24 words
The apparatus set forth in claim 5 wherein the current injected into said first node and said second node is stepped maximum to minimum.
Claim 9
Dependent Claim
43 words
The apparatus set forth in claim 4 wherein each of the operational amplifiers has therein a compensation capacitor which is used in the normal operation of said operational amplifiers, but which is switched out of the operational amplifier circuit during a calibration operation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-13 | 1998-09-12 | 1999-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-13 | 2002-09-12 | 2003-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-13 | 2006-09-12 | 2007-03-14 | $7700.00 | Window Closed / Lapsed |