← Back to Patent Explorer
US5396094A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device with a capacitor having a protection layer

Assignee: Panasonic Holdings Corp
•
Filing: 1994-01-24
•
Granted: 1995-03-07
•
Expires: 2014-01-24
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor memory device in which a protection layer is disposed between a silicon storage electrode and a tantalum pentoxide dielectric layer. A conductive material having a larger free energy of oxide formation than that of the tantalum pentoxide is used for forming the protection layer. Therefore, no native oxide film is formed at the interface between the storage electrode and the dielectric layer. As a result, the dielectric constant of the dielectric layer does not decrease even when the dielectric layer is a thin film.

Inventors

  • 👤 Naoto Matsuo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 17:43
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 123 words
A semiconductor memory device comprising a plurality of memory cells each having a switching transistor and a storage capacitor, said storage capacitor comprising: a first electrode electrically connected to said switching transistor, said first electrode having a top face and a side face; a protection layer formed on said first electrode; a dielectric layer formed on said protection layer, said dielectric layer being made of a first metal oxide; and a second electrode formed on said dielectric layer; wherein said protection layer consists of a refractory metal with a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide, and said protection layer covers said top face and said side face of said first electrode.
Claim 2
Dependent Claim 123 words
A semiconductor memory device comprising a plurality of memory cells each having a switching transistor and a storage capacitor, said storage capacitor comprising: a first electrode electrically connected to said switching transistor, said first electrode having a top face and a side face; a protection layer formed on said first electrode; a dielectric layer formed on said protection layer, said dielectric layer being made of a first metal oxide; and a second electrode formed on said dielectric layer; wherein said protection layer consists of a refractory metal with a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide, and said protection layer covers said top face and said side face of said first electrode.
Claim 3
Dependent Claim 152 words
A semiconductor memory device comprising a plurality of memory cells each having a switching transistor and a storage capacitor, said storage capacitor comprising: a first electrode electrically connected to said switching transistor; a dielectric layer formed on said first electrode, said dielectric layer being made of a first metal oxide; and a second electrode formed on said dielectric layer wherein said second electrode includes at least a first layer formed on said dielectric layer and a second layer formed on said first layer, said first layer being made of a material which has a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide, said second layer covering entirely a top face of said first layer; wherein said first electrode comprises a conductive material with a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide.
Claim 4
Dependent Claim 152 words
A semiconductor memory device comprising a plurality of memory cells each having a switching transistor and a storage capacitor, said storage capacitor comprising: a first electrode electrically connected to said switching transistor; a dielectric layer formed on said first electrode, said dielectric layer being made of a first metal oxide; and a second electrode formed on said dielectric layer wherein said second electrode includes at least a first layer formed on said dielectric layer and a second layer formed on said first layer, said first layer being made of a material which has a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide, said second layer covering entirely a top face of said first layer; wherein said first electrode comprises a conductive material with a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide.
Claim 5
Dependent Claim 45 words
A semiconductor memory device according to claim 1 or 2, wherein said second electrode is made of a material which has a lower tendency to oxidize to form a third oxide as compared to the oxide-forming tendency of the metal of said first metal oxide.
Claim 6
Dependent Claim 61 words
A semiconductor memory device according to claim 1, wherein said second electrode includes at least a first layer formed on said dielectric layer and a second layer formed on said first layer, said first layer being made of a material which has a lower tendency to oxidize as compared to the oxide-forming tendency of the metal of said first metal oxide.
Claim 7
Dependent Claim 29 words
A semiconductor memory device according to claim 1, wherein said first oxide is tantalum oxide, and said refractory metal is selected from the group consisting of tungsten and molybdenum.
Claim 8
Dependent Claim 35 words
A semiconductor memory device according to claim 2, wherein said first oxide is tantalum oxide, and said conductive material is a material selected from the group consisting of tungsten, molybdenum, tungsten silicide, and molybdenum silicide.
Claim 9
Dependent Claim 32 words
A semiconductor memory device according to claim 5 or 6, wherein said second electrode is made of a material selected from the group consisting of tungsten, molybdenum, tungsten silicide, and molybdenum silicide.
Claim 10
Dependent Claim 55 words
A semiconductor memory device according to claim 5 or 6; wherein said second electrode includes at least a first layer formed on said dielectric layer and a second layer formed on said first layer, said first layer being made of a material selected from the group consisting of tungsten, molybdenum, tungsten silicide, and molybdenum silicide.
Claim 11
Dependent Claim 21 words
A semiconductor memory device according to claim 2, wherein said second layer of said second electrode is made of polycrystalline silicon.

References Cited (Backward Citations)

JPS6072261A Cited
JPS6190394A Cited
JPS61150368A Cited
JPS62120066A Cited
US5189503A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-03-06 1998-09-05 1999-03-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-03-06 2002-09-05 2003-03-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-03-06 2006-09-05 2007-03-07 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag