Patent US5164937A successfully refreshed from Google Patents.
US5396084A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Thin film transistor device having driving circuit and matrix circuit
Assignee: Samsung Display Co Ltd
•
Filing: 1993-06-02
•
Granted: 1995-03-07
•
Expires: 2013-06-02
Abstract
Abstract A thin film semiconductor device comprises a matrix circuit portion and a peripheral circuit portion. An NMOS thin film transistor included in the peripheral circuit portion comprises as an active layer a polysilicon thin film formed on a substrate, leading to a high on-current and an improved switching speed, compared with a thin film transistor including as an active layer of a polysilicon thin film which is obtained by crystallizing an amorphous silicon thin film. An NMOS thin film transistor included in the matrix circuit portion also comprises as an active layer a polysilicon thin film which is formed on the substrate. However, the gate insulating film of an NMOS thin film transistor in the matrix circuit portion as a whole is made thicker than that in the NMOS thin film transistor included in the peripheral circuit portion because of the presence of a first interlayer insulating film.
Inventors
- 👤 Hiroshi Matsumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:01
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; H10D86/431; H10D86/60; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739; Y; Y10; Y10S; Y10S438/00; Y10S438/981
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
173 words
A thin film semiconductor device, comprising: a substrate having a first region and a second region; a first non-memory thin film transistor formed on said first region of said substrate and including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode; and a second non-memory thin film transistor formed on said second region of said substrate and being controllably driven by said first thin film transistor, said second non-memory thin film transistor including, a polysilicon semiconductor thin film, and a gate insulating film, a gate electrode, a source electrode and a drain electrode, said gate insulating film of said second thin film transistor being thicker than that of said first thin film transistor; whereby a gate voltage to reach on-current in said first thin film transistor is lower than that in said second thin film transistor, and a gate voltage range to keep an off-current range in said second thin film transistor is broader than that in said first thin film transistor.
Claim 2
Dependent Claim
173 words
A thin film semiconductor device, comprising: a substrate having a first region and a second region; a first non-memory thin film transistor formed on said first region of said substrate and including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode; and a second non-memory thin film transistor formed on said second region of said substrate and being controllably driven by said first thin film transistor, said second non-memory thin film transistor including, a polysilicon semiconductor thin film, and a gate insulating film, a gate electrode, a source electrode and a drain electrode, said gate insulating film of said second thin film transistor being thicker than that of said first thin film transistor; whereby a gate voltage to reach on-current in said first thin film transistor is lower than that in said second thin film transistor, and a gate voltage range to keep an off-current range in said second thin film transistor is broader than that in said first thin film transistor.
Claim 3
Dependent Claim
29 words
The thin film semiconductor device according to claim 1, which further comprises a pixel electrode connected to said source electrode or drain electrode of said second thin film transistor.
Claim 4
Dependent Claim
34 words
The thin film semiconductor device according to claim 1, wherein said gate insulating film of said second thin film transistor is of a laminate structure consisting of an upper layer and a lower layer.
Claim 5
Dependent Claim
35 words
The thin film semiconductor device according to claim 3, wherein said upper layers of said gate insulating film included in said second thin film transistor covers said gate electrode of said first thin film transistor.
Claim 6
Dependent Claim
223 words
A thin film semiconductor device, comprising: a substrate having a first region and a second region; a peripheral circuit portion formed on said substrate having a plurality of first non-memory thin film transistors, each of said first thin film transistors including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode; and a matrix circuit portion formed in the vicinity of said peripheral circuit portion by arranging on said substrate a plurality of second non-memory thin film transistors to form a matrix, each of said second thin film transistors including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode, said gate insulating film included in each of said second thin film transistors being thicker than that included in each of said first thin film transistors, said peripheral circuit portion serving to drive each of said second thin film transistors included in said matrix circuit portion; whereby a gate voltage to reach on-current in each of said first thin film transistors is lower than that in each of said second thin film transistors, and a gate voltage range to keep an off-current range in each of said second thin film transistors is broader than that in each of said first thin film transistors.
Claim 7
Dependent Claim
223 words
A thin film semiconductor device, comprising: a substrate having a first region and a second region; a peripheral circuit portion formed on said substrate having a plurality of first non-memory thin film transistors, each of said first thin film transistors including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode; and a matrix circuit portion formed in the vicinity of said peripheral circuit portion by arranging on said substrate a plurality of second non-memory thin film transistors to form a matrix, each of said second thin film transistors including, a polysilicon semiconductor thin film, a gate insulating film, and a gate electrode, a source electrode and a drain electrode, said gate insulating film included in each of said second thin film transistors being thicker than that included in each of said first thin film transistors, said peripheral circuit portion serving to drive each of said second thin film transistors included in said matrix circuit portion; whereby a gate voltage to reach on-current in each of said first thin film transistors is lower than that in each of said second thin film transistors, and a gate voltage range to keep an off-current range in each of said second thin film transistors is broader than that in each of said first thin film transistors.
Claim 8
Dependent Claim
14 words
The thin film semiconductor device according to claim 5, wherein said substrate is transparent.
Claim 9
Dependent Claim
32 words
The thin film semiconductor device according to claim 6, which further comprises a pixel electrode connected to said source or drain electrode of said second thin film transistor and an intermediate electrode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-06 | 1998-09-05 | 1999-03-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-06 | 2002-09-05 | 2003-03-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-06 | 2006-09-05 | 2007-03-07 | $7700.00 | Window Closed / Lapsed |