Apparatus for transitioning between power supply levels

Claim 2

A circuit for transitioning between power supply levels, comprising: a first input power supply terminal for receiving a first power supply level; a second input power supply terminal for receiving a second power supply level; a third input power supply terminal for receiving a third power supply level; an output power supply terminal for providing primary power to operate a target circuit; a control signal; a control means for receiving said control signal and for determining, based upon said control signal, which one of said first and second input power supply levels to provide at said output power supply terminal; and a circuit means for smoothly and gradually transitioning from providing said first input power supply level to providing said second input power supply level at said output power supply terminal, said circuit means transitioning in response to said control means, said circuit means being coupled to said first input power supply terminal, said second input power supply terminal, said third input power supply terminal, said output power supply terminal, and said control means.

Claim 3

A circuit as in claim 1, wherein said circuit means is capable of transitioning from providing said second input power supply level at said output power supply terminal, to subsequently providing said first input power supply level at said output power supply terminal.

Claim 4

A circuit as in claim 1, wherein said circuit means comprises: a resistive element coupled between said first input power supply terminal and said output power supply terminal.

Claim 5

A circuit as in claim 1, wherein said control means comprises: a field effect transistor, having a first current electrode coupled to said circuit means, having a second current electrode coupled to said third input power supply terminal, and having a control electrode coupled to receive said control signal.

Claim 6

A circuit as in claim 1, wherein said target circuit comprises: an amplifier having an amplifier input, an amplifier output, and a power input, the power input being coupled to said output power supply terminal, said amplifier receiving primary power from said output power supply terminal.

Claim 7

A circuit as in claim 1, wherein said circuit means comprises: a first p-channel field effect transistor, having a first current electrode coupled to said first input power supply terminal, having a second current electrode coupled to said output power supply terminal, and having a control electrode coupled to said control means.

Claim 8

A circuit as in claim 6, wherein said circuit means further comprises: a first resistive element coupled between said first input power supply terminal and the first current electrode of said first p-channel field effect transistor.

Claim 9

A circuit as in claim 7, wherein said control means comprises: an n-channel field effect transistor (98), having a first current electrode, having a second current electrode coupled to said third input power supply terminal, and having a control electrode coupled to said control signal; and a second p-channel field effect transistor (84), having a first current electrode coupled to said first input power supply terminal having a second current electrode, and having a control electrode coupled to said control signal a second resistive element having a first terminal coupled to said second current electrode of said second P-channel field effect transistor, and having a second terminal coupled to the control electrode of said first P-channel field effect transistor; a third resistive element, having a first terminal coupled to the control electrode of said first P-channel field effect transistor, and having a second terminal coupled to said first current electrode of said n-channel field effect transistor; and a capacitive element, having a first electrode coupled to the control electrode of said first P-channel field effect transistor, and having a second electrode coupled to said third input power supply terminal.

Claim 10

A circuit as in claim 7, wherein said circuit means further comprises: a second resistive element, having a first terminal coupled to the control electrode of said first p-channel field effect transistor, and having a second terminal coupled to a one of said first input power supply terminal and said third input power supply terminal; a third resistive element, coupled in parallel with said second resistive element, said third resistive element having a first terminal coupled to the control electrode of said first p-channel field effect transistor, and having a second terminal coupled to the one of said first input power supply terminal and said third input power supply terminal; and a capacitive element, having a first electrode coupled to the control electrode of said first p-channel field effect transistor, and having a second electrode coupled to an other of the one of said first input power supply terminal and said third input power supply terminal.

Claim 11

A circuit as in claim 9, wherein said control means comprises: an n-channel field effect transistor (58), having a first current electrode coupled to the control electrode of said first p-channel field effect transistor, having a second current electrode coupled to said third input power supply terminal, and having a control electrode coupled to said control signal.

Claim 12

A circuit as in claim 10, wherein said circuit means further comprises: a second p-channel field effect transistor (48), having a first current electrode coupled to said first input power supply terminal, having a second current electrode coupled to the control electrode of said first p-channel field effect transistor, and having a control electrode coupled to said first input power supply terminal.

Claim 13

A circuit as in claim 9, wherein said control means comprises: a second p-channel field effect transistor (64), having a first current electrode coupled to the control electrode of said first p-channel field effect transistor, having a second current electrode coupled to said first input power supply terminal, and having a control electrode coupled to said control signal.

Claim 14

A circuit as in claim 12, wherein said circuit means further comprises: an n-channel field effect transistor (76) having a first current electrode coupled to the control electrode of said first p-channel field effect transistor, having a second current electrode coupled to said third input power supply terminal, and having a control electrode coupled to said third input power supply terminal.

Claim 15

A data processing system, comprising: a target circuit; and a circuit for transitioning between power supply levels; and wherein said circuit for transitioning between power supply levels comprises: a first input power supply terminal for receiving a first power supply level; a second input power supply terminal for receiving a second power supply level; a third input power supply terminal for receiving a third power supply level; an output power supply terminal for providing an output power supply level, said output power supply terminal providing primary power to operate said target circuit, said output power supply terminal being coupled to said target circuit; a control signal which is capable of changing back and forth between a first logic level and a second logic level; a control means for receiving said control signal and for determining, based upon said control signal, which one of said first and second input power supply levels to provide at said output power supply terminal; and a circuit means for smoothly and gradually transitioning from providing said first input power supply level to providing said second input power supply level at said output power supply terminal, said circuit means transitioning in response to said control means, said circuit means being coupled to said first input power supply terminal, said second input power supply terminal, said third input power supply terminal, said output power supply terminal, and said control means.

Claim 16

A data processing system, comprising: a target circuit; and a circuit for transitioning between power supply levels; and wherein said circuit for transitioning between power supply levels comprises: a first input power supply terminal for receiving a first power supply level; a second input power supply terminal for receiving a second power supply level; a third input power supply terminal for receiving a third power supply level; an output power supply terminal for providing an output power supply level, said output power supply terminal providing primary power to operate said target circuit, said output power supply terminal being coupled to said target circuit; a control signal which is capable of changing back and forth between a first logic level and a second logic level; a control means for receiving said control signal and for determining, based upon said control signal, which one of said first and second input power supply levels to provide at said output power supply terminal; and a circuit means for smoothly and gradually transitioning from providing said first input power supply level to providing said second input power supply level at said output power supply terminal, said circuit means transitioning in response to said control means, said circuit means being coupled to said first input power supply terminal, said second input power supply terminal, said third input power supply terminal, said output power supply terminal, and said control means.

Claim 17

A data processing system as in claim 14, wherein said first power supply level is at a higher voltage potential than said second power supply level, and wherein said second power supply level is at a higher voltage potential than said third power supply level.

Claim 18

A data processing system as in claim 14, wherein said target circuit comprises: an amplifier having an amplifier input, an amplifier output, and a power input, the power input being coupled to said output power supply terminal, said amplifier receiving primary power from said output power supply terminal.

Claim 19

A data processing system as in claim 14, wherein said circuit means comprises: a resistive element, having a first terminal coupled to said first input power supply terminal, and having a second terminal; and a p-channel field effect transistor, having a first current electrode coupled to the second terminal of said resistive element, having a second current electrode coupled to said second input power supply terminal and coupled to said output power supply terminal and having a control electrode coupled to said control means.

Claim 20

A data processing system, comprising: a target circuit; and a circuit for transitioning between power supply levels; and wherein said circuit for transitioning between power supply levels comprises: a first input power supply terminal for receiving a first power supply level; a second input power supply terminal for receiving a second power supply level; a third input power supply terminal for receiving a third power supply level; an output power supply terminal for providing an output power supply level, said output power supply terminal providing primary power to operate said target circuit, said output power supply terminal being coupled to said target circuit; a control signal; a control means for receiving said control signal and for determining, based upon said control signal, which one of said first and second input power supply levels to provide at said output power supply terminal; and a circuit means for smoothly and gradually transitioning from providing said first input power supply level to providing said second input power supply level at said output power supply terminal, said circuit means being capable of subsequently transitioning back to providing said first input power supply level at said output power supply terminal, said circuit means transitioning in response to said control means, said circuit means being coupled to said first input power supply terminal, said second input power supply terminal, said third input power supply terminal, said output power supply terminal, and said control means.

Claim 21

A data processing system, comprising: a target circuit; and a circuit for transitioning between power supply levels; and wherein said circuit for transitioning between power supply levels comprises: a first input power supply terminal for receiving a first power supply level; a second input power supply terminal for receiving a second power supply level; a third input power supply terminal for receiving a third power supply level; an output power supply terminal for providing an output power supply level, said output power supply terminal providing primary power to operate said target circuit, said output power supply terminal being coupled to said target circuit; a control signal; a control means for receiving said control signal and for determining, based upon said control signal, which one of said first and second input power supply levels to provide at said output power supply terminal; and a circuit means for smoothly and gradually transitioning from providing said first input power supply level to providing said second input power supply level at said output power supply terminal, said circuit means being capable of subsequently transitioning back to providing said first input power supply level at said output power supply terminal, said circuit means transitioning in response to said control means, said circuit means being coupled to said first input power supply terminal, said second input power supply terminal, said third input power supply terminal, said output power supply terminal, and said control means.

Claim 22

A circuit as in claim 18, wherein said circuit means further comprises: a first resistive element, having a first terminal coupled to said first input power supply terminal, and having a second terminal; a field effect transistor, having a first current electrode coupled to the second terminal of said first resistive element, having a second current electrode coupled to said output power supply terminal, and having a control electrode; a second resistive element having a first terminal coupled to the control electrode of said field effect transistor, and having a second terminal coupled to a one of said first input power supply terminal and said third input power supply terminal; and a capacitive element, having a first electrode coupled to the control electrode of said field effect transistor, and having a second electrode coupled to an other of the one of said first input power supply terminal and said third input power supply terminal.