US5391931A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Protection of integrated circuit devices
Assignee: BAE Systems Electronics Ltd
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Filing: 1992-06-22
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Granted: 1995-02-21
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Expires: 2012-06-22
Abstract
Abstract An arrangement for protecting an integrated circuit device (11) against latch up during a nuclear event comprising a capacitance (15) and a switch (17) connected in parallel across the power supply lines (13) of the device. When the power supply lines are connected to a power supply (19) the capacitance stores energy sufficient to supply necessary operating currents to the device during its normal operation. The switch is arranged so that, under a transient gamma pulse incident thereon during a nuclear event, its impedance is set to a low value at such a rate that the energy stored by the capacitance is discharged through the switch and the voltage applied to the device via the power supply lines is pulled down to such a level and at such a rate as to prevent transient gamma pulse induced latch-up in the device.
Inventors
- 👤 David J. Larner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 11:34
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/20; H02; H02H; H02H5/00; H02H5/005; H03; H03K; H03K19/00; H03K19/003; H03K19/0033; Y; Y10; Y10S; Y10S257/00; Y10S257/921
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
132 words
A circuit comprising: at least one integrated circuit device; a pair of power supply lines for said device; a capacitance connected across said power supply lines which serves to reduce transients in the power supplied via said lines to said device in normal operation of the circuit; and connected across said capacitance and forming a unit therewith, a switch means whose impedance, when a transient gamma pulse is incident thereon during a nuclear event, is reduced to a low value at a rate such that the energy stored in the capacitance is discharged through the switch means and the voltage applied to the device via the power supply lines is pulled down to such a level and at such a rate as to prevent transient gamma pulse induced latch-up in the device.
Claim 2
Dependent Claim
132 words
A circuit comprising: at least one integrated circuit device; a pair of power supply lines for said device; a capacitance connected across said power supply lines which serves to reduce transients in the power supplied via said lines to said device in normal operation of the circuit; and connected across said capacitance and forming a unit therewith, a switch means whose impedance, when a transient gamma pulse is incident thereon during a nuclear event, is reduced to a low value at a rate such that the energy stored in the capacitance is discharged through the switch means and the voltage applied to the device via the power supply lines is pulled down to such a level and at such a rate as to prevent transient gamma pulse induced latch-up in the device.
Claim 3
Dependent Claim
35 words
A circuit according to claim 1 wherein said capacitance is constituted partly by the inherent capacitance of said switch means and partly by the capacitance of a capacitor connected in parallel with said switch means.
Claim 4
Dependent Claim
14 words
A circuit according to claim 2 wherein said switch means is a semiconductor device.
Claim 5
Dependent Claim
15 words
A circuit according to claim 3 wherein said switch means is a PIN diode device.
Claim 6
Dependent Claim
21 words
A circuit according to claim 1 wherein said capacitance is constituted substantially wholly by the inherent capacitance of said switch means.
Claim 7
Dependent Claim
15 words
A circuit according to claim 5 wherein said switch means is a PIN diode device.
Claim 8
Dependent Claim
18 words
A circuit according to claim I wherein said capacitance has a value of about 2000 pF or more.
References Cited (Backward Citations)
US3886379A
Cited
US3982197A
Cited
US4010403A
Cited
US4037140A
Cited
US4695937A
Cited
GB2136648A
Cited
US4687622A
Cited
US4876584A
Cited
US4800299A
Cited
GB2202403A
Cited
US4794261A
Cited
US5010321A
Cited
US5103283A
Cited
US5072169A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-02-20 | 1998-08-22 | 1999-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-02-20 | 2002-08-22 | 2003-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-02-20 | 2006-08-22 | 2007-02-21 | $7700.00 | Window Closed / Lapsed |