Advanced video display processor having color palette

Claim 2

A video display processor comprising: a memory port for reading and writing a plurality of color data and color codes from an external memory; a graphics processor connected to said memory port for sequentially reading color data from the external memory via said memory port corresponding to respective pixels of a raster scan video display; at least one sprite register storing a sprite horizontal location and sprite color data for a corresponding mobile pattern of a predetermined size in pixels smaller than said video display, said at least one sprite register outputting said sprite color data when said raster scan of said video display has a horizontal location including said corresponding mobile pattern; a color palette including an input, a plurality of color palette registers each storing a color code wherein the number of colors specificable by said color codes exceed the number of said color palette registers and an output, said color palette outputting a color code via said output corresponding to color data received at said input; a color priority logic connected to said graphics processor, said at least one sprite register and said color palette, said color priority logic supplying said color data from said graphics processor to said input of said color palette when none of said at least one sprite register output sprite color data and supplying said sprite color data to said input of said color palette from a sprite register having the highest priority in a predetermined priority of sprites when any one of said at least one sprite register outputs sprite color data; and a digital to analog converter having an input connected to said output of said color palette and an output, said digital to analog converter outputting at least one analog color signal corresponding to color codes received at said input of said digital to analog converter.

Claim 3

The video display processor of claim 1, wherein: data corresponding to a sprite horizontal location, a sprite vertical location and sprite color data for each mobile pattern are stored in the external memory; and said video display processor further comprises a sprite control logic connected to said memory port and said at least one sprite register for determining if a next horizontal line of said raster scan of said video display includes any mobile pattern and for reading a sprite horizontal location and sprite color data for each such mobile pattern from the external memory and storing said read sprite horizontal location and said read sprite color data in a corresponding sprite register.

Claim 4

The video display processor of claim 2, wherein: said data corresponding to a sprite horizontal location, a sprite vertical location and sprite color data for each mobile pattern stored in the external memory includes sprite color data for each horizontal line of the mobile pattern; and said sprite control logic reads said sprite color data for each such mobile pattern from the external memory corresponding to the next horizontal line, whereby a single mobile pattern may include different sprite color data for different horizontal lines.

Claim 5

The video display processor of claim 1, further comprising: each of said at least one sprite register further stores a sprite pattern including a single bit for each pixel of a horizontal extent of said corresponding mobile pattern for a current horizontal line of said raster scan of said video display, said sprite register outputting said sprite color data if said sprite pattern bit corresponding to a current horizontal position of said raster scan of said video display has a first digital state, and not outputting said sprite color data if said sprite pattern bit corresponding to the current horizontal position of said raster scan of said video display has a second digital state, whereby said second digital state of said sprite pattern selects a transparent state where said color priority logic supplies said color data from said graphics processor to said input of said color palette.

Claim 6

The video display processor of claim 1, further comprising: a border color register storing a border color for a border area around an active area of said video display; and said color priority logic is further connected to said border color register, said color priority logic further supplying said border color from said border color register to said input of said color palette when said raster scan of said video display is within said border area, whereby said border color has priority over said sprite color of any mobile pattern within said border area.

Claim 7

The video display processor of claim 1, wherein: said graphics processor further includes a pattern register having bits corresponding to each pixel of a horizontal line, said graphics processor color data sequentially read from the external memory via said memory port for respective pixels of a raster scan video display having a first color data part and a second color data part, said graphics processor outputting said first color part if said pattern register bit corresponding to a current horizontal position of said raster scan of said video display has a first digital state, and output said second color data part if said pattern register bit corresponding to the current horizontal position of said raster scan of said video display has a second digital state, whereby said pattern register selects between a first color corresponding to said first color part and a second color corresponding to said second color part.

Claim 8

A video display system comprising: a host processor; a memory for storing color data and color codes; a video display processor disposed on a single integrated circuit including a memory port connected to said memory for reading and writing a plurality of color data and color codes from said memory, a graphics processor connected to said memory port for sequentially reading color data from said memory via said memory port corresponding to respective pixels of a raster scan video display, at least one sprite register storing a sprite horizontal location and sprite color data for a corresponding mobile pattern of a predetermined size in pixels smaller than said video display, said at least one sprite register outputting said sprite color data when said raster scan of said video display has a horizontal location including said corresponding mobile pattern, a color palette including an input, a plurality of color palette registers each storing a color code wherein the number of colors specifiable by said color codes exceed the number of said color palette registers and an output, said color palette outputting a color code via said output corresponding to color data received at said input, a host processor port connected to said host processor and said color palette permitting said host processor to write color codes into each of said color palette registers, a color priority logic connected to said graphics processor, said at least one sprite register and said color palette, said color priority logic supplying said color data from said graphics processor to said input of said color palette when none of said at least one sprite register output sprite color data and supplying said sprite color data to said input of said color palette from a sprite register having the highest priority in a predetermined priority of sprites when any one of said at least one sprite register outputs sprite color data, a digital to analog converter having an input connected to said output of said color palette and an output, said digital to analog converter outputting at least one analog color signal corresponding to color codes received at said input of said digital to analog converter; and a video display connected to said digital to analog converter for generating a visual display corresponding to said at least one analog color signal.

Claim 9

A video display system comprising: a host processor; a memory for storing color data and color codes; a video display processor disposed on a single integrated circuit including a memory port connected to said memory for reading and writing a plurality of color data and color codes from said memory, a graphics processor connected to said memory port for sequentially reading color data from said memory via said memory port corresponding to respective pixels of a raster scan video display, at least one sprite register storing a sprite horizontal location and sprite color data for a corresponding mobile pattern of a predetermined size in pixels smaller than said video display, said at least one sprite register outputting said sprite color data when said raster scan of said video display has a horizontal location including said corresponding mobile pattern, a color palette including an input, a plurality of color palette registers each storing a color code wherein the number of colors specifiable by said color codes exceed the number of said color palette registers and an output, said color palette outputting a color code via said output corresponding to color data received at said input, a host processor port connected to said host processor and said color palette permitting said host processor to write color codes into each of said color palette registers, a color priority logic connected to said graphics processor, said at least one sprite register and said color palette, said color priority logic supplying said color data from said graphics processor to said input of said color palette when none of said at least one sprite register output sprite color data and supplying said sprite color data to said input of said color palette from a sprite register having the highest priority in a predetermined priority of sprites when any one of said at least one sprite register outputs sprite color data, a digital to analog converter having an input connected to said output of said color palette and an output, said digital to analog converter outputting at least one analog color signal corresponding to color codes received at said input of said digital to analog converter; and a video display connected to said digital to analog converter for generating a visual display corresponding to said at least one analog color signal.

Claim 10

The video display system of claim 7, wherein: data corresponding to a sprite horizontal location, a sprite vertical location and sprite color data for each mobile pattern are stored in said memory; and said video display processor further includes a sprite control logic connected to said memory port and said at least one sprite register for determining if a next horizontal line of said raster scan of said video display includes any mobile pattern and for reading a sprite horizontal location and sprite color data for each such mobile pattern from said memory and storing said read sprite horizontal location and said read sprite color data in a corresponding sprite register.

Claim 11

The video display system of claim 8, wherein: said data corresponding to a sprite horizontal location, a sprite vertical location and sprite color data for each mobile pattern stored in said memory includes sprite color data for each horizontal line of the mobile pattern; and said sprite control logic reads said sprite color data for each such mobile pattern from said memory corresponding to the next horizontal line, whereby a single mobile pattern may include different sprite color data for different horizontal lines.

Claim 12

The video display system of claim 7, wherein: each of said at least one sprite register further stores a sprite pattern including a single bit for each pixel of a horizontal extent of said corresponding mobile pattern for a current horizontal line of said raster scan of said video display, said sprite register outputting said sprite color data if said sprite pattern bit corresponding to a current horizontal position of said raster scan of said video display has a first digital state, and not outputting said sprite color data if said sprite pattern bit corresponding to the current horizontal position of said raster scan of said video display has a second digital state, whereby said second digital state of said sprite pattern selects a transparent state where said color priority logic supplies said color data from said graphics processor to said input of said color palette.

Claim 13

The video display system of claim 7, wherein: said video display processor further includes a border color register storing a border color for a border area around an active area of said video display, and said color priority logic is further connected to said border color register, said color priority logic further supplying said border color from said border color register to said input of said color palette when said raster scan of said video display is within said border area, whereby said border color has priority over said sprite color of any mobile pattern within said border area.

Claim 14

The video display system of claim 7, wherein: said memory stores said color data including a first color data part and a second color data part; said graphics processor further includes a pattern register having bits corresponding to each pixel of a horizontal line, said graphics processor outputting said first color part if said pattern register bit corresponding to a current horizontal position of said raster scan of said video display has a first digital state, and outputting said second color data part if said pattern register bit corresponding to the current horizontal position of said raster scan of said video display has a second digital state, whereby said pattern register selects between a first color corresponding to said first color part and a second color corresponding to said second color part.