Patent US5655814A successfully refreshed from Google Patents.
Patent US2247962A successfully refreshed from Google Patents.
US5378944A
Expired / Lapsed
US
⏱️ 0.0 years remaining
IC card input/output control circuit
Assignee: Mitsubishi Electric Corp
•
Filing: 1993-05-11
•
Granted: 1995-01-03
•
Expires: 2013-05-11
Abstract
Abstract An input/output control circuit for an IC card equipped with one-time programmable read only memory integrated circuits (PROM-ICs) includes a read data bus buffer connected between the one-time PROM-ICs and a data bus; a write data bus buffer connected between the one time PROM-ICs and the data bus; and a selection device for detecting the power supply voltage supplied to the one-time PROM-ICs and selecting one of the read data bus buffer and the write data bus buffer in response to the detected power supply voltage. The input/output control circuit improves the ability of the IC card to withstand electrostatic discharge and prevents the electrical characteristics of an IC card from changing with a change in the number of one-time PROM-ICs mounted thereon.
Inventors
- 👤 Hidenobu Gochi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 07:24
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/0008; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G11; G11C; G11C17/00; G11C17/14; G11C17/18; G11C7/00; G11C7/10
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
114 words
An input/output control circuit for an IC card equipped with one-time programmable read only memory integrated circuits (PROM-ICs) comprising: a read data bus buffer connected between a plurality of one-time PROM-ICs and a data bus; a write data bus buffer connected between the one time PROM-ICs and the data bus; and selection means for detecting a power supply voltage supplied to the one-time PROM-ICs on a power supply line and selecting one of said read data bus buffer and said write data bus buffer in response to the detected power supply voltage wherein said selection means includes a Zener diode and a resistance connected in series between the power supply line and a ground.
Claim 2
Dependent Claim
114 words
An input/output control circuit for an IC card equipped with one-time programmable read only memory integrated circuits (PROM-ICs) comprising: a read data bus buffer connected between a plurality of one-time PROM-ICs and a data bus; a write data bus buffer connected between the one time PROM-ICs and the data bus; and selection means for detecting a power supply voltage supplied to the one-time PROM-ICs on a power supply line and selecting one of said read data bus buffer and said write data bus buffer in response to the detected power supply voltage wherein said selection means includes a Zener diode and a resistance connected in series between the power supply line and a ground.
Claim 3
Dependent Claim
29 words
The circuit according to claim 1 including an address decoder wherein one of the plurality of PROM-ICs is selected by said address decoder in response to an address signal.
Claim 4
Dependent Claim
161 words
An input/output control circuit for an IC card equipped with one-time programmable read only memory integrated circuits (PROM-ICs) having first and second write modes, said circuit comprising: a read data bus buffer connected between a plurality of one-time PROM-ICs and a data bus; a write data bus buffer connected between the one time PROM-ICs and the data bus and having a first buffer corresponding to a first write mode and a second buffer corresponding to a second write mode; first selection means for detecting a power supply voltage supplied to the one-time PROM-ICs on a power supply line and selecting one of said read data bus buffer and said write data bus buffer in response to the detected power supply voltage; and second selection means for selecting one of said first and second buffers of said write data bus buffer in response to a write mode switching signal specifying one of the first and second write modes to the one-time PROM-ICs.
Claim 5
Dependent Claim
161 words
An input/output control circuit for an IC card equipped with one-time programmable read only memory integrated circuits (PROM-ICs) having first and second write modes, said circuit comprising: a read data bus buffer connected between a plurality of one-time PROM-ICs and a data bus; a write data bus buffer connected between the one time PROM-ICs and the data bus and having a first buffer corresponding to a first write mode and a second buffer corresponding to a second write mode; first selection means for detecting a power supply voltage supplied to the one-time PROM-ICs on a power supply line and selecting one of said read data bus buffer and said write data bus buffer in response to the detected power supply voltage; and second selection means for selecting one of said first and second buffers of said write data bus buffer in response to a write mode switching signal specifying one of the first and second write modes to the one-time PROM-ICs.
Claim 6
Dependent Claim
38 words
The circuit according to claim 3 wherein said selection means includes a Zener diode and a resistance connected in series between the power supply line and a ground for supplying a power supply voltage to the one-time PROM-ICs.
Claim 7
Dependent Claim
29 words
The circuit according to claim 3 including an address decoder wherein one of the plurality of PROM-ICs is selected by said address decoder in response to an address signal.
Claim 8
Dependent Claim
50 words
The circuit according to claim 5 wherein said address decoder includes a first address decoder corresponding to a first write mode and a second address decoder corresponding to a second write mode, one of said first and second address decoders being selected in response to a write mode switching signal.
References Cited (Backward Citations)
US4498022A
Cited
US5241662A
Cited
US4916662A
Cited
US5025415A
Cited
US5202852A
Cited
US5016223A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-01-02 | 1998-07-04 | 1999-01-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-02 | 2002-07-04 | 2003-01-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-02 | 2006-07-04 | 2007-01-03 | $7700.00 | Window Closed / Lapsed |