Level shifting circuit

Claim 2

A level shifting circuit comprising: a first voltage terminal for supplying a first voltage level; a second voltage terminal for supplying a second voltage level; a first input terminal for receiving a first input signal; a second input terminal for receiving a second input signal; an output terminal; a level converter circuit including, first, second and third nodes, a first field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the first node and a control electrode connected to said first input terminal, a second field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the second node and a control electrode connected to said second input terminal, a third field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the first node and a control electrode connected to the second node, a resistive element connected between the second and third nodes, and a fourth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the third node and a control electrode connected to the first node; and an output circuit including, a fifth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to said output terminal and a control electrode connected to the second node, and a sixth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to said output terminal and a control electrode connected to the third node.

Claim 3

A level shifting circuit according to claim 1, wherein said output circuit further comprises: a seventh field effect transistor having a first electrode connected to said first voltage terminal, a second electrode connected to the first terminal of the fifth filed effect transistor and a control electrode coupled for receiving a control signal, and an eighth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to said output terminal and a control electrode coupled for receiving the control signal.

Claim 4

A level shifting circuit according to claim 2, wherein said output circuit further comprises, an additional output terminal, a ninth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the additional output terminal and a control electrode connected to the second node, a tenth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the additional output terminal and a control electrode connected to the third node, an eleventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the additional output terminal and a control electrode coupled for receiving the control signal, and a twelfth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the sixth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 5

A level shifting circuit according to claim 1, wherein said output circuit further comprises, a seventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to said output terminal and a control electrode coupled for receiving a control signal, and an eighth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the sixth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 6

A level shifting circuit according to claim 1, wherein said resistive element includes a resistor connected between the second and third nodes.

Claim 7

A level shifting circuit according to claim 1, wherein said resistive element includes a p-channel type field effect transistor having a first electrode connected to the second node, a second electrode connected to the third node and a control electrode coupled for receiving the first voltage level.

Claim 8

A level shifting circuit according to claim 1, wherein said resistive element includes an n-channel type field effect transistor having a first electrode connected to the second node, a second electrode connected to the third node and a control electrode coupled for receiving the second voltage level.

Claim 9

A level shifting circuit according to claim 1, wherein said resistive element includes, a p-channel type field effect transistor having a first electrode connected to the second node, a second electrode connected to the third node and a control electrode coupled for receiving the first voltage level, and an n-channel type field effect transistor having a first electrode connected to the second node, a second electrode connected to the third node and a control electrode coupled for receiving the second voltage level.

Claim 10

A level shifting circuit comprising: a first voltage terminal for supplying a first voltage level; a second voltage terminal for supplying a second voltage level; a first input terminal for receiving a first input signal; a second input terminal for receiving a second input signal; an output terminal; a level converter circuit including, first, second, third and fourth nodes, a first field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the first node and a control electrode connected to said first input terminal, a second field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the second node and a control electrode connected to said second input terminal, a first resistive element connected between the first and third nodes, a third field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the third node and a control electrode connected to the second node, a second resistive element connected between the second and fourth nodes, and a fourth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the fourth node and a control electrode connected to the first node; and an output circuit including, a fifth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to said output terminal and a control electrode connected to the second node, and a sixth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to said output terminal and a control electrode connected to the fourth node.

Claim 11

A level shifting circuit comprising: a first voltage terminal for supplying a first voltage level; a second voltage terminal for supplying a second voltage level; a first input terminal for receiving a first input signal; a second input terminal for receiving a second input signal; an output terminal; a level converter circuit including, first, second, third and fourth nodes, a first field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the first node and a control electrode connected to said first input terminal, a second field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the second node and a control electrode connected to said second input terminal, a first resistive element connected between the first and third nodes, a third field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the third node and a control electrode connected to the second node, a second resistive element connected between the second and fourth nodes, and a fourth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the fourth node and a control electrode connected to the first node; and an output circuit including, a fifth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to said output terminal and a control electrode connected to the second node, and a sixth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to said output terminal and a control electrode connected to the fourth node.

Claim 12

A level shifting circuit according to claim 9, further comprising an additional output circuit including, a first additional output terminal, a seventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the first additional output terminal and a control electrode connected to the second node, and an eighth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the first additional output terminal and a control electrode connected to the fourth node.

Claim 13

A level shifting circuit according to claim 9, wherein said output circuit further comprises, a seventh field effect transistor having a first electrode connected to said first voltage terminal, a second electrode connected to the first terminal of the fifth field effect transistor and a control electrode coupled for receiving a control signal, and an eighth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to said output terminal and a control electrode coupled for receiving the control signal.

Claim 14

A level shifting circuit according to claim 11, wherein said output circuit further comprises, an additional output terminal, a ninth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the additional output terminal and a control electrode connected to the second node, a tenth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the additional output terminal and a control electrode connected to the third node, an eleventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the additional output terminal and a control electrode coupled for receiving the control signal, and a twelfth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the sixth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 15

A level shifting circuit according to claim 9, wherein said output circuit further comprises, a seventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to said output terminal and a control electrode coupled for receiving a control signal, and an eighth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the sixth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 16

A level shifting circuit according to claim 10, wherein the additional output circuit further comprises, a ninth field effect transistor having a first electrode connected to said first voltage terminal, a second electrode connected to the first terminal of the seventh field effect transistor and a control electrode coupled for receiving a control signal, and a tenth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the first additional output terminal and a control electrode coupled for receiving the control signal.

Claim 17

A level shifting circuit according to claim 14, wherein the additional output circuit further comprises, a second additional output signal, an eleventh field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the second additional output terminal and a control electrode connected to the first node, a twelfth field effect transistor having a first electrode coupled for receiving the second voltage level, a second electrode connected to the second additional output terminal and a control electrode connected to the third node, a thirteenth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the second additional output terminal and a control electrode coupled for receiving the control signal, and a fourteenth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the eighth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 18

A level shifting circuit according to claim 10, wherein the additional output circuit further comprises, a ninth field effect transistor having a first electrode coupled for receiving the first voltage level, a second electrode connected to the first additional output terminal and a control electrode coupled for receiving a control signal, and a tenth field effect transistor having a first electrode connected to said second voltage terminal, a second electrode connected to the first terminal of the eighth field effect transistor and a control electrode coupled for receiving the control signal.

Claim 19

A level shifting circuit including first and second input terminals for respectively receiving first and second complementary input signals both of which have a first signal level and an output terminal for outputting an output signal having a second signal level which is different from the first signal level, the level shifting circuit comprising: first, second and third nodes; a first input circuit coupled to the first input terminal and the first node for bringing a potential level on the first node to a first potential level when the first complementary input signal is in a first state; a second input circuit coupled to the second input terminal and the second node for bringing a potential level on the second node to the first potential level when the second complementary input signal is in the first state; a first adjust circuit coupled to the first and second nodes for bringing the potential level on the first node to a second potential level in response to the potential level on the second node; a second adjust circuit coupled to the first and third nodes for bringing a potential level on the third node to the second potential level in response to the potential level on the first node; a third adjust circuit coupled to the second and third nodes for bringing the potential level on the second node to the potential level on the third node with a predetermined delay; a first output circuit coupled to the second node and the output terminal for bringing a potential level on the output terminal to the first potential level in response to the potential level on the second node; and a second output circuit coupled to the third node and the output terminal for bringing the potential level on the output terminal to the second potential level in response to the potential level on the third node.

Claim 20

A level shifting circuit including first and second input terminals for respectively receiving first and second complementary input signals both of which have a first signal level and an output terminal for outputting an output signal having a second signal level which is different from the first signal level, the level shifting circuit comprising: first, second and third nodes; a first input circuit coupled to the first input terminal and the first node for bringing a potential level on the first node to a first potential level when the first complementary input signal is in a first state; a second input circuit coupled to the second input terminal and the second node for bringing a potential level on the second node to the first potential level when the second complementary input signal is in the first state; a first adjust circuit coupled to the first and second nodes for bringing the potential level on the first node to a second potential level in response to the potential level on the second node; a second adjust circuit coupled to the first and third nodes for bringing a potential level on the third node to the second potential level in response to the potential level on the first node; a third adjust circuit coupled to the second and third nodes for bringing the potential level on the second node to the potential level on the third node with a predetermined delay; a first output circuit coupled to the second node and the output terminal for bringing a potential level on the output terminal to the first potential level in response to the potential level on the second node; and a second output circuit coupled to the third node and the output terminal for bringing the potential level on the output terminal to the second potential level in response to the potential level on the third node.

Claim 21

A level shifting circuit according to claim 17, wherein said first input circuit comprises a first field effect transistor having a first electrode coupled for receiving the first potential level, a second electrode connected to the first node and a control electrode connected to the first input terminal, and wherein said second input circuit comprises a second field effect transistor having a first electrode coupled for receiving the first potential level, a second electrode connected to the second node and a control electrode connected to said second input terminal.

Claim 22

A level shifting circuit according to claim 17, wherein said first adjust circuit comprises a third field effect transistor having a first electrode coupled for receiving the second potential level, a second electrode connected to the first node and a control electrode connected to the second node and wherein said second adjust circuit comprises a fourth field effect transistor having a first electrode coupled for receiving the second potential level, a second electrode connected to the third node and a control electrode connected to the first node.

Claim 23

A level shifting circuit according to claim 17, wherein said first output circuit comprises a fifth field effect transistor having a first electrode coupled for receiving the first potential level, a second electrode connected to the output terminal and a control electrode connected to the second node, and wherein said first output circuit comprises a sixth field effect transistor having a first electrode coupled for receiving the second potential level, a second electrode connected to said output terminal and a control electrode connected to the third node.

Claim 24

A level shifting circuit according to claim 17, wherein said third adjust circuit comprises a resistive element connected between the second and third nodes.

Claim 25

A level shifting circuit including first and second input terminals for respectively receiving first and second complementary input signals both of which have a first signal level and an output terminal for outputting an output signal having a second signal level which is different from the first signal level, the level shifting circuit comprising: first, second, third and fourth nodes; a first input circuit coupled to the first input terminal and the fist node for bringing a potential level on the first node to a first potential level when the first complementary input signal is in a first state; a second input circuit coupled to the second input terminal and the second node for bringing a potential level on the second node to the first potential level when the second complementary input signal is in the first state; a first adjust circuit coupled to the second and fourth nodes for bringing a potential level on the fourth node to a second potential level in response to the potential level on the second node; a second adjust circuit coupled to the first and third nodes for bringing a potential level on the third node to the second potential level in response to the potential level on the first node; a third adjust circuit coupled to the second and fourth nodes for bringing the potential level on the second node to the potential level on the fourth node with a first delay; a fourth adjust circuit coupled to the first and third nodes for bringing the potential level on the first node to the potential level on the third node with a first delay; a first output circuit coupled to the second node and the output terminal for bringing a potential level on the output terminal to the first potential level in response to the potential level on the second node; and a second output circuit coupled to the fourth node and the output terminal for bringing the potential level on the output terminal to the second potential level in response to the potential level on the fourth node.

Claim 26

A level shifting circuit including first and second input terminals for respectively receiving first and second complementary input signals both of which have a first signal level and an output terminal for outputting an output signal having a second signal level which is different from the first signal level, the level shifting circuit comprising: first, second, third and fourth nodes; a first input circuit coupled to the first input terminal and the fist node for bringing a potential level on the first node to a first potential level when the first complementary input signal is in a first state; a second input circuit coupled to the second input terminal and the second node for bringing a potential level on the second node to the first potential level when the second complementary input signal is in the first state; a first adjust circuit coupled to the second and fourth nodes for bringing a potential level on the fourth node to a second potential level in response to the potential level on the second node; a second adjust circuit coupled to the first and third nodes for bringing a potential level on the third node to the second potential level in response to the potential level on the first node; a third adjust circuit coupled to the second and fourth nodes for bringing the potential level on the second node to the potential level on the fourth node with a first delay; a fourth adjust circuit coupled to the first and third nodes for bringing the potential level on the first node to the potential level on the third node with a first delay; a first output circuit coupled to the second node and the output terminal for bringing a potential level on the output terminal to the first potential level in response to the potential level on the second node; and a second output circuit coupled to the fourth node and the output terminal for bringing the potential level on the output terminal to the second potential level in response to the potential level on the fourth node.

Claim 27

A level shifting circuit according to claim 22, further comprising: an additional output terminal for outputting another output signal having the second signal level; a third output circuit coupled to the first node and the additional output terminal for bringing a potential level on the additional output terminal to the first potential level in response to the potential level on the first note; and a fourth output circuit coupled to the third node and the additional output terminal for bringing the potential level on the additional output terminal to the second potential Level in response to the potential level on the third node.