Multiprocessing system using indirect addressing to access respective local semaphore registers bits for setting the bit or branching if the bit is set

Claim 1

A method of accessing data in an information register in a tightly coupled interprocessor communication system for a multiprocessor data processing system; wherein said communication system comprises a plurality of separate communication paths, a common shared resource circuit connected to said plurality of separate communications paths, a plurality of local control means each connected to a processor and a respective one of said separate communications paths for communicating and coordinating data transfer between said shared resource circuit and the connected processor, wherein said shared resource circuit includes shared semaphore registers and shared information registers and wherein each said local control means includes a local semaphore register whose contents mirror the contents of an associated shared semaphore register, the method comprising the steps of: associating a bit in the local semaphore register with a desired shared information register, said associating step comprises the steps of: providing a register in said local control means having said local semaphore register; loading a bit number into the register by said processor connected to said local control means; and addressing the bit stored in the local semaphore register via the bit number stored in the register; testing the bit; if the bit is set, executing an instruction starting at a branch address; and if the bit is not set, accessing the desired shared information register, wherein the accessing step comprises the steps of: setting a bit in the associated shared semaphore register; addressing said desired shared information register; and clearing the bit set in the shared semaphore register.

Claim 2

A method of accessing data in an information register in a tightly coupled interprocessor communication system for a multiprocessor data processing system; wherein said communication system comprises a plurality of separate communication paths, a common shared resource circuit connected to said plurality of separate communications paths, a plurality of local control means each connected to a processor and a respective one of said separate communications paths for communicating and coordinating data transfer between said shared resource circuit and the connected processor, wherein said shared resource circuit includes shared semaphore registers and shared information registers and wherein each said local control means includes a local semaphore register whose contents mirror the contents of an associated shared semaphore register, the method comprising the steps of: associating a bit in the local semaphore register with a desired shared information register, said associating step comprises the steps of: providing a register in said local control means having said local semaphore register; loading a bit number into the register by said processor connected to said local control means; and addressing the bit stored in the local semaphore register via the bit number stored in the register; testing the bit; if the bit is set, executing an instruction starting at a branch address; and if the bit is not set, accessing the desired shared information register, wherein the accessing step comprises the steps of: setting a bit in the associated shared semaphore register; addressing said desired shared information register; and clearing the bit set in the shared semaphore register.