US5365148A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sinusoidal inductorless dimmer providing an amplitude attenuated output
Assignee: Electronics Diversified Inc
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Filing: 1992-11-19
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Granted: 1994-11-15
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Expires: 2012-11-19
Abstract
Abstract A dimmer control circuit for application to a load bank produces a sinusoidal power wave form exhibiting the desirable characteristic of suitable rise and fall times producing little or no audible or radio frequency interference. A pair of MOS-FET power devices operate in a linear mode and attenuate respective half-cycles of a single phase power line as a function of a dimmer control signal applied thereto. The device includes a mechanism for avoiding damage to the power MOS-FET by controlling conditions under which a signal change is applied to the gates of the MOSFETs, and by imbalanced attenuation between the MOS-FETs through the range of the dimmer control signal.
Inventors
- 👤 Paul E. Mallon
- 👤 Gary S. Bateman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 21:10
CPC Classifications
H; H05; H05B; H05B39/00; H05B39/04; H05B39/041; H05B39/044; H05B39/048; G; G05; G05F; G05F1/00; G05F1/10; G05F1/12; G05F1/40; G05F1/44; G05F1/45; G05F1/452; Y; Y02; Y02B; Y02B20/00; Y10; Y10S; Y10S315/00; Y10S315/04
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
249 words
A dimmer circuit receiving a sinusoidal line power source and driving a load therewith between full power and zero power conditions, the dimmer circuit comprising: input logic receiving a dimmer control signal representing a magnitude of dimming relative to said full power condition and providing an internal dimmer control signal corresponding to said magnitude of dimming; a first power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated relative to said line power source, said first power attenuation component having a gate terminal coupled to said internal dimmer control signal and scaling at a given amplitude throughout a first half-cycle of said load power source relative to said line power source as a function of said dimmer control signal; a second power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated relative to said line power source, said second power attenuation component having a gate terminal coupled to said internal dimmer control signal and at a given amplitude scaling amplitude throughout a second half-cycle of said load power source relative to said line power source as a function of said dimmer control signal; and a biasing arrangement prebiasing said first power attenuation device relative to the second power attenuation device whereby said first power attenuation device scales throughout said first half-cycle differently than said second power attenuation device scales throughout said second half-cycle for a given magnitude of said internal dimmer control signal.
Claim 2
Dependent Claim
249 words
A dimmer circuit receiving a sinusoidal line power source and driving a load therewith between full power and zero power conditions, the dimmer circuit comprising: input logic receiving a dimmer control signal representing a magnitude of dimming relative to said full power condition and providing an internal dimmer control signal corresponding to said magnitude of dimming; a first power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated relative to said line power source, said first power attenuation component having a gate terminal coupled to said internal dimmer control signal and scaling at a given amplitude throughout a first half-cycle of said load power source relative to said line power source as a function of said dimmer control signal; a second power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated relative to said line power source, said second power attenuation component having a gate terminal coupled to said internal dimmer control signal and at a given amplitude scaling amplitude throughout a second half-cycle of said load power source relative to said line power source as a function of said dimmer control signal; and a biasing arrangement prebiasing said first power attenuation device relative to the second power attenuation device whereby said first power attenuation device scales throughout said first half-cycle differently than said second power attenuation device scales throughout said second half-cycle for a given magnitude of said internal dimmer control signal.
Claim 3
Dependent Claim
50 words
A dimmer circuit according to claim 1 wherein said biasing arrangement responds through a range of said internal dimmer control signal by allowing conduction in said first power attenuation component in a first portion of said range and inhibiting conduction in said second power attenuation component through said first portion.
Claim 4
Dependent Claim
46 words
A dimmer circuit according to claim 1 wherein each of said power attenuation devices includes a maximum heat producing level of operation and said biasing arrangement avoids concurrent operation of said first and second power attenuation devices at the corresponding maximum heat producing levels of operation.
Claim 5
Dependent Claim
18 words
A dimmer circuit according to claim 1 wherein said first and second power attenuation devices are MOS-FET devices.
Claim 6
Dependent Claim
161 words
A dimmer circuit receiving a sinusoidal line power source and driving a load therewith between full power and zero power conditions, the dimmer circuit comprising: input logic receiving a dimmer control signal representing a magnitude of dimming relative to said full power condition and providing an internal dimmer control signal corresponding to said magnitude of dimming; a power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated in amplitude relative to said line power source, said power attenuation component having a gate terminal coupled to said internal dimmer control signal and scaling at a given amplitude said load power source relative to said line power source as a function of said dimmer control signal throughout at least one half-cycle of said sinusoidal load power source; and a start control for said internal dimmer control signal preventing change in said internal dimmer control signal under conditions associated with damage to said power attenuation device.
Claim 7
Dependent Claim
161 words
A dimmer circuit receiving a sinusoidal line power source and driving a load therewith between full power and zero power conditions, the dimmer circuit comprising: input logic receiving a dimmer control signal representing a magnitude of dimming relative to said full power condition and providing an internal dimmer control signal corresponding to said magnitude of dimming; a power attenuation component receiving said sinusoidal power source and providing an amplitude scaled sinusoidal load power source attenuated in amplitude relative to said line power source, said power attenuation component having a gate terminal coupled to said internal dimmer control signal and scaling at a given amplitude said load power source relative to said line power source as a function of said dimmer control signal throughout at least one half-cycle of said sinusoidal load power source; and a start control for said internal dimmer control signal preventing change in said internal dimmer control signal under conditions associated with damage to said power attenuation device.
Claim 8
Dependent Claim
30 words
A dimmer circuit according to claim 5 wherein said start control block permits change in said internal dimmer control signal concurrently with a zero crossing in said line power source.
Claim 9
Dependent Claim
42 words
A dimmer circuit according to claim 5 wherein said start control block allows only change in said internal dimmer control signal to a valid value, a valid value being defined as being outside a damage zone associated with the power attenuation device.
Claim 10
Dependent Claim
54 words
A dimmer circuit according to claim 5 wherein said start control block presents change in said internal dimmer control signal concurrently with a zero crossing in said line power source and only to a predetermined valid level, a valid level being determined by reference to a damage zone associated with said power attenuation device.
Claim 11
Independent Claim
107 words
A method of attenuating a sinusoidal power signal for application to a load, the method comprising the steps: receiving an external dimming command at a conversion circuit; converting at said conversion circuit the external dimming command to a presented internal dimming control signal; validating the presented internal dimming control signal with respect to damage conditions associated with a power attenuation device; maintaining a last presented valid dimming control signal; applying the last presented valid dimming control signal to a control terminal of the power attenuation device in such manner to amplitude attenuate the power signal as a function of said last presented valid internal dimming control signal.
Claim 12
Independent Claim
107 words
A method of attenuating a sinusoidal power signal for application to a load, the method comprising the steps: receiving an external dimming command at a conversion circuit; converting at said conversion circuit the external dimming command to a presented internal dimming control signal; validating the presented internal dimming control signal with respect to damage conditions associated with a power attenuation device; maintaining a last presented valid dimming control signal; applying the last presented valid dimming control signal to a control terminal of the power attenuation device in such manner to amplitude attenuate the power signal as a function of said last presented valid internal dimming control signal.
Claim 13
Dependent Claim
28 words
A method according to claim 9 wherein said validating step comprises the step of validating the presented internal dimming control signal with reference to a time of presentation.
Claim 14
Dependent Claim
31 words
A method according to claim 10 wherein said validating step comprises the step of validating the presented internal dimming control signal with respect to a phase angle of the power signal.
Claim 15
Dependent Claim
30 words
A method according to claim 11 wherein said validating step comprises the step of validating the presented internal dimming control signal with respect to a zero crossing the power signal.
Claim 16
Dependent Claim
31 words
A method according to claim 9 wherein said validating step comprises the step of validating the presented dimming control signal with reference to the magnitude of the internal dimming control signal.
Claim 17
Dependent Claim
24 words
A method according to claim 13 wherein said reference to magnitude is a reference to a damage zone associated with the power attenuation device.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-14 | 1998-05-16 | 1998-11-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-14 | 2002-05-16 | 2002-11-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-14 | 2006-05-16 | 2006-11-15 | $7700.00 | Window Closed / Lapsed |