Method of fabricating an BPSG-filled trend and oxidation isolation structure with a gate electrode

Claim 1

A method of fabricating a semiconductor device comprising the steps of: forming a gate insulating film, a polycrystalline silicon film and a first insulating film sequentially on a semiconductor substrate providing a portion acting as an active region in the semiconductore substrate and partitioning said active region by an element isolation region formed by selective oxidation; selectively etching said first insulating film, polycrystalline silicon film and gate insulating film corresponding to any portions within said active region which act as trench isolation regions in said semiconductor device and thereafter etching said semiconductor substrate in self-alignment with said first insulating film, to form said trench isolation regions; covering the resulting structure with a second insulating film and successively burying a third insulating film having a faster dry etch rate than that of said second insulating film; covering said active region exclusive of a boundary between said active region and said element isolation region with a resist film; dry etching-back a region exclusive of said active region covered with said resist film by using said resist film as a mask and said polycrystalline film as a stopper at least until a thickness of said third insulating film of said region exclusive of said active region covered with said resist film is thinner than that of said third insulating film of said active region covered with said resist film; removing said resist film and dry etching-back the resulting structure by using said polycrystalline silicon film as a stopper to cause said second and third insulating films to remain in said trench isolation regions; depositing an electrically conductive film on the surface of the resulting structure; and selectively removing said electrically conductive film and said polycrystalline silicon film to form gate electrodes.

Claim 2

A method of fabricating a semiconductor device comprising the steps of: forming a gate insulating film, a polycrystalline silicon film and a first insulating film sequentially on a semiconductor substrate providing a portion acting as an active region in the semiconductore substrate and partitioning said active region by an element isolation region formed by selective oxidation; selectively etching said first insulating film, polycrystalline silicon film and gate insulating film corresponding to any portions within said active region which act as trench isolation regions in said semiconductor device and thereafter etching said semiconductor substrate in self-alignment with said first insulating film, to form said trench isolation regions; covering the resulting structure with a second insulating film and successively burying a third insulating film having a faster dry etch rate than that of said second insulating film; covering said active region exclusive of a boundary between said active region and said element isolation region with a resist film; dry etching-back a region exclusive of said active region covered with said resist film by using said resist film as a mask and said polycrystalline film as a stopper at least until a thickness of said third insulating film of said region exclusive of said active region covered with said resist film is thinner than that of said third insulating film of said active region covered with said resist film; removing said resist film and dry etching-back the resulting structure by using said polycrystalline silicon film as a stopper to cause said second and third insulating films to remain in said trench isolation regions; depositing an electrically conductive film on the surface of the resulting structure; and selectively removing said electrically conductive film and said polycrystalline silicon film to form gate electrodes.

Claim 8

A method of fabricating a semiconductor device comprising the steps of: forming a gate insulating film, a polycrystalline silicon film and a first insulating film sequentially on a semiconductor substrate; providing a portion acting as an active region in said semiconductor substrate and partitioning said active region by an element isolation region formed by selective oxidation; selectively etching said first insulating film, polycrystalline silicon film and gate insulating film corresponding to any portions within said active region which act as trench isolation regions in said semiconductor device and thereafter etching said semiconductor substrate in self-alignment with said first insulating film, to form said trench isolation regions; covering the resulting structure with a second insulating film and successively burying a third insulating film having faster dry etch rate than that of said second insulating film; dry etching-back the resulting structure by using said polycrystalline silicon film as a stopper to cause said second and third insulating films to remain at least in said trench isolation regions; covering said active region exclusive of a boundary between said active region and said element isolation region with a resist film; completely removing said first insulating film by using said resist film as a mask; depositing an electrically conductive film on the surface of the resulting structure; and selectively removing said electrically conductive film and said polycrystalline silicon film to form gate electrodes.

Claim 9

A method of fabricating a semiconductor device comprising the steps of: forming a gate insulating film, a polycrystalline silicon film and a first insulating film sequentially on a semiconductor substrate; providing a portion acting as an active region in said semiconductor substrate and partitioning said active region by an element isolation region formed by selective oxidation; selectively etching said first insulating film, polycrystalline silicon film and gate insulating film corresponding to any portions within said active region which act as trench isolation regions in said semiconductor device and thereafter etching said semiconductor substrate in self-alignment with said first insulating film, to form said trench isolation regions; covering the resulting structure with a second insulating film and successively burying a third insulating film having faster dry etch rate than that of said second insulating film; dry etching-back the resulting structure by using said polycrystalline silicon film as a stopper to cause said second and third insulating films to remain at least in said trench isolation regions; covering said active region exclusive of a boundary between said active region and said element isolation region with a resist film; completely removing said first insulating film by using said resist film as a mask; depositing an electrically conductive film on the surface of the resulting structure; and selectively removing said electrically conductive film and said polycrystalline silicon film to form gate electrodes.