US5361000A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reference potential generating circuit
Assignee: Micron Memory Japan Ltd
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Filing: 1992-08-26
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Granted: 1994-11-01
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Expires: 2012-08-26
Abstract
Abstract A reference potential generating circuit includes a plurality of MOS field effect transistors and a reference potential driver circuit. The MOS field effect transistors have different threshold voltages and a reference potential is obtained by amplifying the threshold voltage difference of the MOS field effect transistors. During the period in which a power supply potential externally supplied is lower than a predetermined target value of the reference potential, the reference potential driver circuit drives an output terminal for producing a potential corresponding to the power supply potential supplied externally. In this reference potential generating circuit, the S/N ratio is good and the circuit operation is stable, and is effective for reducing the power consumption and for increasing the integration density in semiconductor integrated circuit devices.
Inventors
- 👤 Yasuji Koshikawa
- 👤 Tadahiko Sugibayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 03:24
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/22; H03K17/223; H03K2217/00; H03K2217/0036
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
175 words
A reference potential generating circuit comprising: a reference potential output terminal; a first driver circuit for producing a reference potential at said reference potential output terminal, said first driver circuit including a difference potential generating circuit for generating a difference potential between threshold voltages of a plurality of MOS field effect transistors having different threshold voltages, and a comparator amplifier for differently amplifying said difference potential generated by said difference potential generating circuit and a potential produced by a division of said reference potential; and a second driver circuit for producing at said reference potential output terminal a potential equaling an increasing power supply voltage during a transient period in which a power supply voltage externally supplied is lower than said reference potential after switching-n of said power supply, said second driver circuit including a sum threshold potential generating circuit for producing a potential of a sum of threshold voltages of a plurality of MOS field effect transistors and a comparator for comparing said potential of the sum of threshold voltages with said reference potential.
Claim 2
Dependent Claim
175 words
A reference potential generating circuit comprising: a reference potential output terminal; a first driver circuit for producing a reference potential at said reference potential output terminal, said first driver circuit including a difference potential generating circuit for generating a difference potential between threshold voltages of a plurality of MOS field effect transistors having different threshold voltages, and a comparator amplifier for differently amplifying said difference potential generated by said difference potential generating circuit and a potential produced by a division of said reference potential; and a second driver circuit for producing at said reference potential output terminal a potential equaling an increasing power supply voltage during a transient period in which a power supply voltage externally supplied is lower than said reference potential after switching-n of said power supply, said second driver circuit including a sum threshold potential generating circuit for producing a potential of a sum of threshold voltages of a plurality of MOS field effect transistors and a comparator for comparing said potential of the sum of threshold voltages with said reference potential.
Claim 3
Dependent Claim
95 words
A reference potential generating circuit according to claim 1, further comprising a third driver circuit for producing at said reference potential output terminal a potential equaling the increasing power supply voltage during said transient period after switching-on of power supply, said third driver circuit including a power-on signal generating circuit for detecting the switching-on of said power supply and generating a power-on signal and a driving circuit for driving, in accordance with said power-on signal from said power-on signal generating circuit, said reference potential output terminal with a potential equaling the increasing power supply voltage.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-31 | 1998-05-02 | 1998-11-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-31 | 2002-05-02 | 2002-11-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-31 | 2006-05-02 | 2006-11-01 | $7700.00 | Window Closed / Lapsed |