IGBT with freewheeling diode

Claim 2

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode formed on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fourth and fifth regions; wherein a plane perpendicular to a surface of said semiconductor substrate and including an edge of said first region nearest to said third region, and another plane perpendicular to a surface of said semiconductor substrate including an edge of said fifth region brought into contact with said fourth region are spaced by a distance equal to or more than 40 τ 1/2 in μm wherein τ is in μs and is a life time of minority carriers in said semiconductor substrate.

Claim 3

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode forked on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a sixth region of said first conductive type with a high impurity density formed on a surface of said fourth region; a seventh region of said second conductive type with a high impurity density formed on the surface of said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fifth, sixth and seventh regions; wherein a plane perpendicular to a surface of said semiconductor substrate and including an edge of said first region nearest to said third region, and another plane perpendicular to a surface of said semiconductor substrate and including an edge of said fifth region brought into contact with said fourth region are spaced by a distance equal to or more than 40 τ 1/2 in μ wherein τ is in μs and is a life time of minority carriers in said semiconductor substrate.

Claim 4

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode forked on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a sixth region of said first conductive type with a high impurity density formed on a surface of said fourth region; a seventh region of said second conductive type with a high impurity density formed on the surface of said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fifth, sixth and seventh regions; wherein a plane perpendicular to a surface of said semiconductor substrate and including an edge of said first region nearest to said third region, and another plane perpendicular to a surface of said semiconductor substrate and including an edge of said fifth region brought into contact with said fourth region are spaced by a distance equal to or more than 40 τ 1/2 in μ wherein τ is in μs and is a life time of minority carriers in said semiconductor substrate.

Claim 5

A semiconductor device as claimed in claim 1 or 2, wherein said second region and said gate electrode are not provided in a portion of said first portion nearest to said third region.

Claim 6

A semiconductor device as claimed in claim 1 or 2, wherein a distance is provided between said first and third regions.

Claim 7

A semiconductor device as claimed in claim 4, further comprising a guard ring region of said second conductive type provided between said first and third regions, wherein said third region surrounds said first region.

Claim 8

A semiconductor device as claimed in claim 1 or 2, wherein said first and second electrodes are connected by a conducting layer with an insulating film formed between said semiconductor substrate and said conducting layer, and a conductor is coupled with said second electrode for connection to an exterior.

Claim 9

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode formed on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fourth and fifth regions; and wherein said second region and said gate electrode are excluded in a portion of said first region nearest to said third region.

Claim 10

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode formed on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fourth and fifth regions; and wherein said second region and said gate electrode are excluded in a portion of said first region nearest to said third region.

Claim 11

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode formed on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a sixth region of said first conductive type with a high impurity density formed on a surface of said fourth region; a seventh region of said second conductive type with a high impurity density formed on the surface of said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fifth, sixth and seventh regions; and wherein said second region and said gate electrode are excluded in a portion of said first region nearest to said third region.

Claim 12

A semiconductor device, comprising: a semiconductor substrate of a first conductive type with a low impurity density; a first region of a second conductive type formed on one surface of said semiconductor substrate; a second region of said first conductive type with a high impurity density formed on the surface of said first region; a third region of said second conductive type with a high impurity density formed on one surface of said semiconductor substrate; a gate insulating film formed on the surface of said first region intervening between an exposed surface of said semiconductor substrate and said second region; a gate electrode formed on said gate insulating film; a fourth region of said second conductive type formed on the other surface of said semiconductor substrate opposite to said first region; a fifth region of said first conductive type with a high impurity density which is opposite to said third region and adjacent to said fourth region; a sixth region of said first conductive type with a high impurity density formed on a surface of said fourth region; a seventh region of said second conductive type with a high impurity density formed on the surface of said fourth region; a first electrode commonly brought into contact with said first and second regions; a second electrode brought into contact with said third region and connected to said first electrode; and a third electrode commonly brought into contact with said fifth, sixth and seventh regions; and wherein said second region and said gate electrode are excluded in a portion of said first region nearest to said third region.