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US5357188A Expired / Lapsed US ⏱️ 0.0 years remaining

Current mirror circuit operable with a low power supply voltage

Assignee: Rohm Co Ltd
•
Filing: 1992-07-22
•
Granted: 1994-10-18
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Expires: 2012-07-22
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Abstract

Abstract The emitter of a first pnp transistor is connected to a power supply voltage via a first resistor. The base and collector of the first transistor are not only connected to each other but connected to a ground terminal via a current source. The emitter of a second pnp transistor is connected to the power supply voltage via a second resistor. The bases of the first and second transistors are connected to each other. An input terminal of this current mirror circuit is connected to the emitter of the first transistor, and an output terminal is connected to the collector of the second transistor.

Inventors

  • 👤 Isoshi Takeda
  • 👤 Shigeyoshi Hayashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 14:23
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 158 words
A current mirror circuit comprising: a first reference voltage terminal and a second reference voltage terminal; a first resistor and a second resistor that are connected to the first reference voltage terminal; a constant current source; a first transistor having an emitter that is connected to the first reference voltage terminal via the first resistor, and a base and a collector that are not only connected to each other but connected to the second reference voltage terminal via the constant current source; and a second transistor of the same junction type as the first transistor, the second transistor having an emitter that is connected to the first reference voltage terminal via the second resistor, and having a base that is connected to the base of the first transistor; wherein the emitter of the first transistor and the collector of the second transistor are connected to an input terminal and an output terminal of the current mirror circuit, respectively.
Claim 2
Dependent Claim 158 words
A current mirror circuit comprising: a first reference voltage terminal and a second reference voltage terminal; a first resistor and a second resistor that are connected to the first reference voltage terminal; a constant current source; a first transistor having an emitter that is connected to the first reference voltage terminal via the first resistor, and a base and a collector that are not only connected to each other but connected to the second reference voltage terminal via the constant current source; and a second transistor of the same junction type as the first transistor, the second transistor having an emitter that is connected to the first reference voltage terminal via the second resistor, and having a base that is connected to the base of the first transistor; wherein the emitter of the first transistor and the collector of the second transistor are connected to an input terminal and an output terminal of the current mirror circuit, respectively.
Claim 3
Dependent Claim 17 words
The current mirror circuit of claim 1, wherein the first and second resistors have the same resistance.

References Cited (Backward Citations)

US4540896A Cited
DE3420068A1 Cited
US4553048A Cited
US5180966A Cited
US5235218A Cited
US5187429A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-17 1998-04-18 1998-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-17 2002-04-18 2002-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-17 2006-04-18 2006-10-18 $7700.00 Window Closed / Lapsed

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