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US5353303A Expired / Lapsed US ⏱️ 0.0 years remaining

Technique for increasing the data rate in a spread spectrum data link

Assignee: United States Department of the Air Force
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Filing: 1993-10-04
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Granted: 1994-10-04
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Expires: 2013-10-04
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Abstract

Abstract A method for increasing the bit rate of a data link is to select two additional 31-bit chip code patterns that are orthogonal to the present two chip codes, and to each other. This method will not require any more bandwidth that the present 10 MHz used. This method suggests that each of the four chip code patterns are assigned a two bit value i.e.: 00, 01, 10, 11. At present, the two correlated chip codes represent data in a pulse position method. No information is transferred by determining which of the two chip codes actually correlated. This new method suggests each of the four chip code patterns will still perform the pulse position modulation and also provide two additional bits of data. These additional two bits of data will up the data rate of the link by 100 percent. Alternatively, the data rate may be increased by coding the datasuch that a reduction in duty cycle is realized as well as an increase in the data rate. Variations of the coding scheme avoid repeating a chip code in successive windows to reduce the effects of multipath propagation.

Inventors

  • 👤 David E. Walthall

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 13:42
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/493; H04B; H04B1/00; H04B1/69; H04B1/707; H04L23/00; H04L23/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 215 words
A method of spread spectrum encoding digital data on a data link in which information is transmitted and received at a given rate on a waveform, comprising: synchronizing the waveform by first transmitting a synchronizing fixed pattern of a predetermined number of bits of 1's and 0's, and generating a sync pulse when all bits of this fixed pattern sync code have been received by a sync corrector, and the sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a fixed chip code sequence of a predetermined number of bits, clocked at said given rate, using at least four different data chip codes, designated as A, B, C and D chip code patterns, with each chip code sequence occurring during a window of a predetermined duration, the two-bit data content being modulated with respect to where the chip code correlated in the window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
Claim 2
Independent Claim 215 words
A method of spread spectrum encoding digital data on a data link in which information is transmitted and received at a given rate on a waveform, comprising: synchronizing the waveform by first transmitting a synchronizing fixed pattern of a predetermined number of bits of 1's and 0's, and generating a sync pulse when all bits of this fixed pattern sync code have been received by a sync corrector, and the sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a fixed chip code sequence of a predetermined number of bits, clocked at said given rate, using at least four different data chip codes, designated as A, B, C and D chip code patterns, with each chip code sequence occurring during a window of a predetermined duration, the two-bit data content being modulated with respect to where the chip code correlated in the window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
Claim 3
Independent Claim 214 words
A method of spread spectrum encoding digital data on a data link in which a waveform is transmitted and received at a 10 MHz rate, comprising: synchronizing the waveform by first transmitting chips with a 127-bit synchronizing fixed pattern of 1's and 0's, and generating a sync pulse when all 127 bits of this fixed pattern sync code have been received by a sync corrector, which sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a 31-bit fixed chip code sequence, clocked at a 10 MHz rate, thus taking 3.1 microseconds to complete, using at least four different 31-bit data chip codes, designated as A, B, C and D chip code patterns, with each 3.1 microsecond chip code sequence occurring during a 4.0-microsecond window, the two-bit data content being encoded with respect to where the chip code correlated in the 4.0-microsecond window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
Claim 4
Independent Claim 214 words
A method of spread spectrum encoding digital data on a data link in which a waveform is transmitted and received at a 10 MHz rate, comprising: synchronizing the waveform by first transmitting chips with a 127-bit synchronizing fixed pattern of 1's and 0's, and generating a sync pulse when all 127 bits of this fixed pattern sync code have been received by a sync corrector, which sync pulse provides all timing references for the duration of a message; modulating a data portion of the waveform with a pulse position code, where each data pulse represents two bits of information, with each pulse modulated as the final chip of a 31-bit fixed chip code sequence, clocked at a 10 MHz rate, thus taking 3.1 microseconds to complete, using at least four different 31-bit data chip codes, designated as A, B, C and D chip code patterns, with each 3.1 microsecond chip code sequence occurring during a 4.0-microsecond window, the two-bit data content being encoded with respect to where the chip code correlated in the 4.0-microsecond window, the four data chip code patterns being orthogonal to each other and to the synchronizing fixed pattern; and having each of the four data chip codes represent data in addition to the two bits represented by said pulse position.
Claim 5
Dependent Claim 51 words
A method of spread spectrum encoding digital data according to claim 2, further having each of the four data chip codes represent two bits of data in addition to the two bits represented by said pulse position, so that each chip code pattern represents a total of four bits of data.
Claim 6
Dependent Claim 101 words
A method of spread spectrum encoding digital data according to claim 3, further having a total of eight of said data chip code sequences provided, so that in addition to said A, B, C and D chip code patterns, there are four chip code sequences designated as E, F, G and H chip code patterns, using four-microsecond windows for A, B, C and D chip code patterns alternating with four-microsecond windows for E, F, G and H chip code patterns, so that the same data chip code pattern does not occur in successive windows, to thereby reduce effects of multipath propagation.
Claim 7
Dependent Claim 89 words
A method of spread spectrum encoding digital data according to claim 2, further having one of two of said data chip code sequences A or B used to modulate the data for the first 4-microsecond pulse position, then having one of two of different ones said data chip code sequences C or D used to modulate the next 4-microsecond pulse position, to thereby yield an alternating chip code sequence, and at the same time which of two possible codes did indeed actually correlate yields an additional bit of data.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-03 1998-04-04 1998-10-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-03 2002-04-04 2002-10-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-03 2006-04-04 2006-10-04 $7700.00 Window Closed / Lapsed

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