US5353300A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Communication method for an adaptive direct sequence CDMA communication system
Assignee: Motorola Solutions Inc
•
Filing: 1993-06-07
•
Granted: 1994-10-04
•
Expires: 2013-06-07
Abstract
Abstract A communication method in an adaptive CDMA communication system (100) capable of communicating a direct sequence spread spectrum communication signals which comprise bit sequences coded with spreading chip sequences. The method includes the steps of transmitting a DS-SS communication signal (30) having a training bit sequence (31) coded with spreading chip sequence. The method includes the step of despreading the DS-SS communication signal based on the training bit sequence (31) during a training interval. The DS-SS communication signals is despread by adaptively determining a despreading chip sequence. Then, following the training interval determining chip timing offset during a chip timing interval. Finally, bit timing offset is determined during a bit timing interval following the chip timing interval.
Inventors
- 👤 Edward K. B. Lee
- 👤 Jimmy Cadd
- 👤 Tracy L. Fulghum
- 👤 Robert S. Babayi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:20
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/7097
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
151 words
In a CDMA communication system having a transmitter for transmitting a direct sequence spread spectrum (DS-SS) communication signal comprising bit sequences coded with spreading chip sequences and a receiver for receiving said communication signal; a communication method comprising the steps of: at the transmitter: spreading the bit sequences including a training bit sequence with the chip sequence to produce a spread bit sequence; modulating the spread bit sequence to produce a DS-SS communication signal; transmitting the DS-SS communication signal; at the receiver: receiving the DS-SS communication signal; demodulating the received DS-SS communication signal; adaptively determining an optimal despreading chip sequence using said training bit sequence during a training interval; determining chip timing offset after the training interval during a chip timing interval to perform bit synchronization; determining bit timing offset after the chip timing interval during a bit timing interval to perform bit synchronization; and despreading said modulated DS-SS communication signal.
Claim 2
Dependent Claim
151 words
In a CDMA communication system having a transmitter for transmitting a direct sequence spread spectrum (DS-SS) communication signal comprising bit sequences coded with spreading chip sequences and a receiver for receiving said communication signal; a communication method comprising the steps of: at the transmitter: spreading the bit sequences including a training bit sequence with the chip sequence to produce a spread bit sequence; modulating the spread bit sequence to produce a DS-SS communication signal; transmitting the DS-SS communication signal; at the receiver: receiving the DS-SS communication signal; demodulating the received DS-SS communication signal; adaptively determining an optimal despreading chip sequence using said training bit sequence during a training interval; determining chip timing offset after the training interval during a chip timing interval to perform bit synchronization; determining bit timing offset after the chip timing interval during a bit timing interval to perform bit synchronization; and despreading said modulated DS-SS communication signal.
Claim 3
Dependent Claim
22 words
The communication method of claim 1, wherein said step of adaptively determining comprises the step of using a tapped delay line equalizer.
Claim 4
Dependent Claim
23 words
The communication of claim 2, wherein the optimal despreading chip sequence is represented by tap coefficient potential of the tapped delay line equalizer.
Claim 5
Dependent Claim
21 words
The communication method of claim 3, wherein said step of determining chip timing offset is based on said tap coefficient potentials.
Claim 6
Dependent Claim
30 words
The communication method of claim 4, wherein said step of determining the chip timing offset includes the step of determining a ratio of minimum coefficient potential to maximum coefficient potential.
Claim 7
Dependent Claim
35 words
The communication method of claim 5, further including the step of determining the sign of the chip timing offset based on the polarity of at least one of the tap coefficients after a chip transition.
Claim 8
Dependent Claim
33 words
The communication method of claim 1, wherein said step of adaptively determining includes the step of: adaptively determining a representation of despreading chip sequence using an equalizer to provide a decoded communication signal.
Claim 9
Dependent Claim
43 words
The communication method of claim 7, wherein the DS-SS communication signal includes a transmitter bit timing sequence which comprises alternating bits wherein the state of at least one of two consecutive bits is changed from one bit interval to the succeeding bit interval.
Claim 10
Dependent Claim
32 words
The communication method of claim 8, wherein said step of determining bit timing offset includes the steps of: integrating the decoded communication signal over a receiver bit interval during the alternating bits.
Claim 11
Dependent Claim
20 words
The communication method of claim 9, wherein the training bit sequence of the DS-SS communication signal includes consecutive non-alternating bits.
Claim 12
Dependent Claim
59 words
The communication method of claim 10, wherein said step of determining bit timing offset includes the steps of: integrating the decoded communication signal over a receiver bit interval during the consecutive non-alternating bits to produce; and determining sign of the bit timing offset by comparing results of integrations obtained during consecutive non-alternating bits with that obtained during alternating bits.
References Cited (Backward Citations)
US5056109A
Cited
US5109390A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-03 | 1998-04-04 | 1998-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-03 | 2002-04-04 | 2002-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-03 | 2006-04-04 | 2006-10-04 | $7700.00 | Window Closed / Lapsed |