Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
156 words
A computer aided designing (CAD) system for designing a circuit pattern for a single printed circuit board, comprising: inputting means for inputting circuit data for the single printed circuit board virtually fractioned into a plurality of fractioned circuit blocks each provided with connection information and designing data of circuit components into a storage area; data processing means for designing in parallel a plurality of virtual printed circuit boards respectively on the basis of the plurality of fractioned circuit blocks, the virtual connection information and the designing data of circuit components being read out of said storage area; combining means for combining the plurality of virtual printed circuit boards designed into the circuit pattern to be printed as the single printed circuit board in accordance with the virtual connection information read out of said storage area; and deleting means for deleting the virtual connection information upon completing the combination of the plurality of virtual printed circuit boards.
Claim 2
Dependent Claim
156 words
A computer aided designing (CAD) system for designing a circuit pattern for a single printed circuit board, comprising: inputting means for inputting circuit data for the single printed circuit board virtually fractioned into a plurality of fractioned circuit blocks each provided with connection information and designing data of circuit components into a storage area; data processing means for designing in parallel a plurality of virtual printed circuit boards respectively on the basis of the plurality of fractioned circuit blocks, the virtual connection information and the designing data of circuit components being read out of said storage area; combining means for combining the plurality of virtual printed circuit boards designed into the circuit pattern to be printed as the single printed circuit board in accordance with the virtual connection information read out of said storage area; and deleting means for deleting the virtual connection information upon completing the combination of the plurality of virtual printed circuit boards.
Claim 3
Dependent Claim
34 words
A CAD system in accordance with claim 1, wherein said inputting means comprises a plurality of circuit diagram input terminals each being assigned to a respective one of said plurality of fractioned circuit blocks.
Claim 4
Dependent Claim
25 words
A CAD system in accordance with claim 2, further comprising data totalizing means for totalizing data entered on said plurality of circuit diagram input terminals.
Claim 5
Dependent Claim
28 words
A CAD system in accordance with claim 3, wherein said plurality of circuit diagram input terminals each is connected to said data totalizing means by a telephone line.
Claim 6
Dependent Claim
29 words
A CAD system in accordance with claim 3, wherein said plurality of circuit diagram input terminals are connected to said data totalizing means by a LAN (Local Area Network).
Claim 7
Dependent Claim
17 words
A CAD system in accordance with claim 3, wherein said data totalizing means comprises a personal computer.
Claim 8
Dependent Claim
30 words
A CAD system in accordance with claim 3, further comprising program inputting means for inputting programs and selectively transferring said programs to said storage area and said data totalizing means.
Claim 9
Dependent Claim
17 words
A CAD system in accordance with claim 7, wherein said data totalizing means comprises a personal computer.
Claim 10
Dependent Claim
20 words
A CAD system in accordance with claim 1, wherein said storage area comprises a storage built in a main computer.
Claim 11
Dependent Claim
20 words
A CAD system in accordance with claim 1, wherein said data processing means comprises a plurality of graphic input terminals.
Claim 12
Independent Claim
139 words
A method of designing a circuit pattern to be provided on a single printed circuit board by the use of a data processor system, comprising the steps of: inputting into the data processor system circuit data for the circuit fractioned into a plurality of fractioned circuit blocks each provided with connection information and designing data of circuit components; designing a plurality of virtual fractioned printed circuit boards on the basis of the plurality of fractioned circuit blocks by reading the circuit data and the designing data of circuit components out of the data processor system; combining the plurality of virtual printed circuit boards into a printed circuit board in accordance with the connection information read out of the data processor system; and deleting the connection information upon completing the combination of the plurality of virtual fractioned printed circuit boards.
Claim 13
Independent Claim
139 words
A method of designing a circuit pattern to be provided on a single printed circuit board by the use of a data processor system, comprising the steps of: inputting into the data processor system circuit data for the circuit fractioned into a plurality of fractioned circuit blocks each provided with connection information and designing data of circuit components; designing a plurality of virtual fractioned printed circuit boards on the basis of the plurality of fractioned circuit blocks by reading the circuit data and the designing data of circuit components out of the data processor system; combining the plurality of virtual printed circuit boards into a printed circuit board in accordance with the connection information read out of the data processor system; and deleting the connection information upon completing the combination of the plurality of virtual fractioned printed circuit boards.
Claim 14
Dependent Claim
56 words
A method in accordance with claim 11, further comprising the steps of: assigning a plurality of circuit diagram input terminals to a respective one of the plurality of fractioned circuit blocks to enter the data in the plurality of circuit diagram input terminals; and totalizing the data entered on said plurality of circuit diagram input terminals.