US5350948A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Hitachi Ltd
•
Filing: 1993-04-21
•
Granted: 1994-09-27
•
Expires: 2013-04-21
Abstract
Abstract Technology capable of simultaneously improving the state of filling in connection holes and the reliability of a wiring material in a bipolar semiconductor device or in a bipolar CMOS device. At least a tungsten film formed by the CVD method is included in a first wiring layer that accomplishes electrical conduction among the semiconductor elements by depositing an electrically conducting film on the connection holes formed in an insulating film deposited on the main surface of a semiconductor substrate. The tungsten film formed by the CVD method helps improve the state of filling in connection holes or deposition property, and enables the connection holes to be formed highly reliably. By using a tungsten film, furthermore, it is allowed to increase the resistance against electromigration of the wiring and to enhance reliability.
Inventors
- 👤 Masaaki Maehara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:44
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/038; H10W20/039; H10W20/40; H10W20/41; H10W20/42; H10W20/052; H10W20/0526; H10W20/063; H10W20/425
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
339 words
A semiconductor device comprising: a semiconductor substrate; a plurality of bipolar transistors provided on said semiconductor substrate, each of said plurality of bipolar transistors comprising: a collector region of a first conductivity type formed on said semiconductor substrate; a base region of a second conductivity type which is opposite said first conductivity type formed on said collector region, said base region including an intrinsic base region and an extrinsic base region surrounding said intrinsic base region; a field oxide layer formed on said semiconductor substrate and surrounding said base region; an emitter region of said first conductivity type formed on said intrinsic base region; a base polysilicon of said second conductivity type contacting said extrinsic base region and extending on said field oxide layer, an inner surface of said base polysilicon surrounding said intrinsic base region and defining a region where said intrinsic base region is formed; an emitter polysilicon of said first conductivity type contacting said emitter region and extending on said base polysilicon, said emitter polysilicon and said base polysilicon being electrically isolated from each other by a side wall spacer formed on said inner side surface of said base polysilicon; and a first insulating film formed on said base polysilicon, said side wall spacer defining a region where said emitter region is formed; a second insulating film provided over said bipolar transistors; and a first wiring layer provided on said second insulating film, said first wiring layer being electrically connected to said bipolar transistors via a plurality of connection holes formed in said second insulating film, said first wiring layer including a first tungsten film and a second tungsten film formed over said first tungsten film, said first tungsten film contacting said second insulating film at said connection holes; a third insulating film formed over said first wiring layer; and a second wiring layer formed on said third insulating film, said second wiring layer including an aluminum film and electrically connected to said first wiring layer via a connection hole formed in said third insulating film.
Claim 2
Dependent Claim
339 words
A semiconductor device comprising: a semiconductor substrate; a plurality of bipolar transistors provided on said semiconductor substrate, each of said plurality of bipolar transistors comprising: a collector region of a first conductivity type formed on said semiconductor substrate; a base region of a second conductivity type which is opposite said first conductivity type formed on said collector region, said base region including an intrinsic base region and an extrinsic base region surrounding said intrinsic base region; a field oxide layer formed on said semiconductor substrate and surrounding said base region; an emitter region of said first conductivity type formed on said intrinsic base region; a base polysilicon of said second conductivity type contacting said extrinsic base region and extending on said field oxide layer, an inner surface of said base polysilicon surrounding said intrinsic base region and defining a region where said intrinsic base region is formed; an emitter polysilicon of said first conductivity type contacting said emitter region and extending on said base polysilicon, said emitter polysilicon and said base polysilicon being electrically isolated from each other by a side wall spacer formed on said inner side surface of said base polysilicon; and a first insulating film formed on said base polysilicon, said side wall spacer defining a region where said emitter region is formed; a second insulating film provided over said bipolar transistors; and a first wiring layer provided on said second insulating film, said first wiring layer being electrically connected to said bipolar transistors via a plurality of connection holes formed in said second insulating film, said first wiring layer including a first tungsten film and a second tungsten film formed over said first tungsten film, said first tungsten film contacting said second insulating film at said connection holes; a third insulating film formed over said first wiring layer; and a second wiring layer formed on said third insulating film, said second wiring layer including an aluminum film and electrically connected to said first wiring layer via a connection hole formed in said third insulating film.
Claim 3
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein said second wiring layer further includes tungsten films formed over and under said aluminum film, sandwiching said aluminum film therebetween.
Claim 4
Dependent Claim
27 words
A semiconductor device according to claim 1, wherein said first wiring layer is a laminated wiring layer having an aluminum film laminated on said second tungsten film.
Claim 5
Dependent Claim
34 words
A semiconductor device according to claim 3, wherein said first wiring layer further includes a third tungsten film formed on said aluminum film, sandwiching said aluminum film between said second and third tungsten films.
Claim 6
Dependent Claim
18 words
A semiconductor device according to claim 1, wherein said first tungsten film is formed by a sputtering method.
Claim 7
Dependent Claim
18 words
A semiconductor device according to claim 5, wherein said second tungsten film is formed by a CVD method.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-26 | 1998-03-28 | 1998-09-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-26 | 2002-03-28 | 2002-09-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-26 | 2006-03-28 | 2006-09-27 | $7700.00 | Window Closed / Lapsed |