System and method for a digital navigation satellite receiver

Claim 2

A receiver for acquiring and tracking analog spread spectrum signals, each signal having an analog carrier signal modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signal to an analog downconverted spread spectrum signal at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signal and providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signal to a digital spread spectrum signal; a plurality of channel processing circuits for demodulating said digital spread spectrum signal to obtain actual code and carrier phase information, each channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each channel processing circuit including correlators for generating predetection integration data in response to said comparison; a search processor which autonomously controls said plurality of channel processing circuits for searching and acquiring said analog spread spectrum signal; and a general purpose processor for overall receiver control.

Claim 3

The receiver set forth in claim 1, further comprising a fourier transform circuit for generating frequency bins from said predetection integration data in order to extend a doppler frequency range of search for said analog carrier signal.

Claim 4

The receiver set forth in claim 2, wherein said fourier transform circuit is a discrete fourier transform approximation circuit using two-bit complex vectors.

Claim 5

The receiver set forth in claim 2, wherein said search processor includes circuitry for interpolating new frequency bins from said frequency bins of said fourier transform circuit.

Claim 6

The receiver set forth in claim 1, wherein said search processor employs a Tong detection algorithm for determining signal acquisition at a particular code state for a predetermined search threshold.

Claim 7

The receiver set forth in claim 5, further comprising a noise meter for dynamic setting of said search threshold.

Claim 8

The receiver set forth in claim 6, wherein said noise meter has a programmable bandwidth.

Claim 9

The receiver set forth in claim 5, wherein said search processor includes a mush counter for limiting a number of passes through said Tong detection algorithm and forces signal acquisition to continue at a new code state after a specific number of passes have been performed at said particular code state.

Claim 10

The receiver set forth in claim 5, wherein said search processor includes a mush counter for limiting a number of passes through said Tong detection and forces signal acquisition to stop after a specific number of passes have been performed.

Claim 11

The receiver set forth in claim 1, wherein said search processor includes a hit counter for aiding in determination of the adequacy of a predetermined search threshold by counting the number of signal samples which exceed said predetermined search threshold for a given search duration.

Claim 12

The receiver set forth in claim 1, wherein said search processor includes circuitry for suspending signal acquisition in response to a period of time of known conditions of bad signal.

Claim 13

The receiver set forth in claim 2, wherein said search processor employs a Tong detection algorithm on said frequency bins, said search processor including frequency bin mask bits which exclude certain frequency bins from being considered in said Tong detection algorithm.

Claim 14

The receiver set forth in claim 5, wherein said search processor includes correlator mask bits which exclude certain correlators from being considered in said Tong detection algorithm.

Claim 15

The receiver set forth in claim 2, wherein said search processor implements a Robertson approximation for generating envelopes for each of said frequency bins.

Claim 16

The receiver of claim 14, wherein said search processor employs a Tong detection algorithm on said frequency bins, said Tong detection algorithm comparing said envelopes to a predetermined search threshold for determining signal acquisition.

Claim 17

The receiver of claim 1, wherein said search processor processes a plurality of code states simultaneously.

Claim 18

The receiver set forth in claim 6, wherein said search processor includes a threshold calculator that adjusts said search threshold in response to an output from said noise meter.

Claim 19

The receiver set forth in claims 4, wherein said search processor includes a threshold calculator that adjusts said search threshold in response to an output from said noise meter, said search processor includes a second threshold calculator corresponding to said interpolated fourier transform frequency bins, said second threshold calculator generating a second threshold which is the square root of two greater than said search threshold of said threshold calculator.

Claim 20

The receiver of claim 1, wherein said search processor circuitry is embedded with said plurality of channel processing circuits on a single monolithic circuit.

Claim 21

A receiver for acquiring and tracking analog spread spectrum signals from a plurality of satellites, each satellite transmitting analog L1 and L2 carrier signals modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signals to analog carrier downconverted spread spectrum signals at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signals and for providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signals to digital spread spectrum signals; a plurality of continuous channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each continuous channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each continuous channel processing circuit having correlators for generating predetection integration data in response to said comparison, each continuous channel processing circuit assigned to a separate satellite; a plurality of rover channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each rover channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each rover channel circuit roves one L-band signal of a plurality of satellites while each continuous channel processing circuit continuously tracks the other L-band signal of a specific satellite; and a general purpose processor for controlling said continuous and rover channel processing circuits during signal acquisition and tracking.

Claim 22

A receiver for acquiring and tracking analog spread spectrum signals from a plurality of satellites, each satellite transmitting analog L1 and L2 carrier signals modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signals to analog carrier downconverted spread spectrum signals at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signals and for providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signals to digital spread spectrum signals; a plurality of continuous channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each continuous channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each continuous channel processing circuit having correlators for generating predetection integration data in response to said comparison, each continuous channel processing circuit assigned to a separate satellite; a plurality of rover channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each rover channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each rover channel circuit roves one L-band signal of a plurality of satellites while each continuous channel processing circuit continuously tracks the other L-band signal of a specific satellite; and a general purpose processor for controlling said continuous and rover channel processing circuits during signal acquisition and tracking.

Claim 23

A receiver for acquiring and tracking analog spread spectrum signals from a plurality of satellites, each satellite transmitting analog L1 and L2 carrier signals modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signals to analog downconverted spread spectrum signals at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signals and for providing control signals for the receiver; a sampling circuit for converting said analog spread spectrum downconverted signals to digital spread spectrum signals; a plurality of continuous channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each continuous channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each continuous channel processing circuit having correlators for generating predetection integration data in response to said comparison, each continuous channel processing circuit assigned to a separate satellite; a plurality of rover channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each rover channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each rover channel circuit roves a remaining plurality of visible satellites; and a general purpose processor for controlling said continuous and rover channel processing circuits during signal acquistion and tracking.

Claim 24

A receiver for acquiring and tracking analog spread spectrum signals from a plurality of satellites, each satellite transmitting analog L1 and L2 carrier signals modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signals to analog downconverted spread spectrum signals at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signals and for providing control signals for the receiver; a sampling circuit for converting said analog spread spectrum downconverted signals to digital spread spectrum signals; a plurality of continuous channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each continuous channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each continuous channel processing circuit having correlators for generating predetection integration data in response to said comparison, each continuous channel processing circuit assigned to a separate satellite; a plurality of rover channel processing circuits for demodulating said digital spread spectrum signals to obtain actual code and carrier phase information, each rover channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each rover channel circuit roves a remaining plurality of visible satellites; and a general purpose processor for controlling said continuous and rover channel processing circuits during signal acquistion and tracking.

Claim 25

A receiver for acquiring and tracking analog spread spectrum signals, each signal having an analog carrier signal modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signal to an analog downconverted spread spectrum signal at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signal and for providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signal to a digital spread spectrum signal; a plurality of channel processing circuits for demodulating said digital spread spectrum signal to obtain actual code and carrier phase information, each channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each channel processing circuit having correlators for generating predetection integration data in response to said comparison, each channel processing circuit including a noise meter for setting thresholds to assist in signal acquisition and tracking; and a general purpose processor for controlling said channel processing circuits during signal acquisition and tracking.

Claim 26

A receiver for acquiring and tracking analog spread spectrum signals, each signal having an analog carrier signal modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signal to an analog downconverted spread spectrum signal at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signal and for providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signal to a digital spread spectrum signal; a plurality of channel processing circuits for demodulating said digital spread spectrum signal to obtain actual code and carrier phase information, each channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each channel processing circuit having correlators for generating predetection integration data in response to said comparison, each channel processing circuit including a noise meter for setting thresholds to assist in signal acquisition and tracking; and a general purpose processor for controlling said channel processing circuits during signal acquisition and tracking.

Claim 27

The receiver of claim 22, wherein said noise meter measures gaussian, continuous wave or pulse noise.

Claim 28

The receiver of claim 22, wherein said noise meter is programmable to a desired pseudorandom noise bandwidth.

Claim 29

A receiver for acquiring and tracking analog spread spectrum signals, each signal having an analog carrier signal modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signal to an analog downconverted spread spectrum signal at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signal and providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signal to a digital spread spectrum signal; a plurality of channel processing circuits for demodulating said digital spread spectrum signal to obtain actual code and carrier phase information, each channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each channel processing circuit including correlators for generating predetection integration data in response to said comparison, each channel processing circuit processing a P(Y) code and a C/A code simultaneously; a general purpose processor for controlling said channel processing circuits during signal acquisition and tracking; and circuitry for performing vector summing of said P(Y) and C/A code for a single satellite to allow tracking of said P(Y) and C/A code with a single tracking loop.

Claim 30

A receiver for acquiring and tracking analog spread spectrum signals, each signal having an analog carrier signal modulated with data and pseudorandom noise codes, comprising: a downconversion circuit for downconverting the analog spread spectrum signal to an analog downconverted spread spectrum signal at a frequency sufficiently low enough for digitization; a local clock generation circuit coupled to said downconversion circuit for generating a sample clock frequency to produce said analog downconverted spread spectrum signal and providing control signals for the receiver; a sampling circuit for converting said analog downconverted spread spectrum signal to a digital spread spectrum signal; a plurality of channel processing circuits for demodulating said digital spread spectrum signal to obtain actual code and carrier phase information, each channel processing circuit generating an estimated code and carrier phase and comparing said estimated code and carrier phase to said actual code and carrier phase, each channel processing circuit including correlators for generating predetection integration data in response to said comparison, each channel processing circuit processing a P(Y) code and a C/A code simultaneously; a general purpose processor for controlling said channel processing circuits during signal acquisition and tracking; and circuitry for performing vector summing of said P(Y) and C/A code for a single satellite to allow tracking of said P(Y) and C/A code with a single tracking loop.