US5347161A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Stacked-layer structure polysilicon emitter contacted p-n junction diode
Assignee: National Science and Technology Council
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Filing: 1992-09-02
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Granted: 1994-09-13
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Expires: 2012-09-02
Abstract
Abstract A process is used to fabricate diodes having an emitter contacted p-n junction. A stack of n+-type polysilicon layers are formed one upon the other upon a p-type silicon substrate. In an accordingly fabricated diode, native oxide layers that forms between the n+-type polysilicon layer and the p-type substrate would be liable to be broken up, and thicker epitaxial layer would be formed between the same. The p-n junction is with a thickness of 0.05-0.2 mu m. As the diode is reverse-biased, for example at -5V, leakage current could be less than 1 n ANGSTROM /cm2. The reverse-bias breakdown voltage could be larger than -100 V. When forward-biased, the ideality factor of the diode is close to unity.
Inventors
- 👤 Shye-Lin Wu
- 👤 Chung-Len Lee
- 👤 Tan-Fu Lei
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 10:20
CPC Classifications
H; H10; H10D; H10D8/00; H10D8/01; H10D8/043; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62; H10D8/411; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
78 words
A p-n junction diode, comprising: (a) a substrate of p-type semiconductor; (b) a stack of at least two layers of N + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least two n + -type polysilicon layers; wherein each of said n + -type polysilicon layers has a thickness in the range from 500 Å to 1000 Å and a donor concentration of at least 10 20 cm -3 .
Claim 2
Dependent Claim
78 words
A p-n junction diode, comprising: (a) a substrate of p-type semiconductor; (b) a stack of at least two layers of N + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least two n + -type polysilicon layers; wherein each of said n + -type polysilicon layers has a thickness in the range from 500 Å to 1000 Å and a donor concentration of at least 10 20 cm -3 .
Claim 3
Dependent Claim
45 words
A p-n junction diode, comprising: (a) a substrate of p-type semiconductor; (b) a stack of at least three layers of n + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least three n + -type polysilicon layers
Claim 4
Dependent Claim
45 words
A p-n junction diode, comprising: (a) a substrate of p-type semiconductor; (b) a stack of at least three layers of n + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least three n + -type polysilicon layers
Claim 5
Dependent Claim
78 words
A p-n junction diode, comprising: (a) a substrate of n-type semiconductor; (b) a stack of at least two layers of p + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least two p + -type polysilicon layers; wherein each of said p + -type polysilicon layers has a thickness in the range from 500 Å to 1000 Å and a donor concentration of at least 10 20 cm -3 .
Claim 6
Dependent Claim
78 words
A p-n junction diode, comprising: (a) a substrate of n-type semiconductor; (b) a stack of at least two layers of p + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least two p + -type polysilicon layers; wherein each of said p + -type polysilicon layers has a thickness in the range from 500 Å to 1000 Å and a donor concentration of at least 10 20 cm -3 .
Claim 7
Dependent Claim
45 words
A p-n junction diode, comprising: (a) a substrate of n-type semiconductor; (b) a stack of at least three layers of p + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least three p + -type polysilicon layers
Claim 8
Dependent Claim
45 words
A p-n junction diode, comprising: (a) a substrate of n-type semiconductor; (b) a stack of at least three layers of p + -type polysilicon formed upon said substrate; and (c) an electrode disposed over said stack of at least three p + -type polysilicon layers
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-09-12 | 1998-03-14 | 1998-09-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-12 | 2002-03-14 | 2002-09-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-12 | 2006-03-14 | 2006-09-13 | $7700.00 | Window Closed / Lapsed |