Digital video camera

Claim 2

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; and processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix, and wherein said line memory means comprises two line memories each storing a plurality of digitized raster scanning data and a switch circuit connected to said two line memories for connecting said two line memories with said processing means alternately, and wherein said processing means includes a camera process circuit receiving block data with N rows and M columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting in aperture correction on the luminance block data.

Claim 3

A digital video camera according to claim 1, wherein said processing means further includes a shift register connected to said line memories for storing block data with N rows and M1 columns where M1 is smaller than M, and a RAM register connected to said line memories and said shift register for storing block data with N rows and M2 columns where M2 is smaller than M1.

Claim 4

A digital video camera according to claim 2, wherein said processing means further includes block buffer means connected to said camera process circuit for storing the luminance block data every block, and a multiplexer connected to said processing means for interleaving transfers of the luminance block data from said block buffer means to an output of said processing means.

Claim 5

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; and processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix, and wherein said line memory means comprises a single line memory, and wherein said processing means includes a camera process circuit receiving block data with N rows and M columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting an aperture correction on the luminance block data.

Claim 6

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; and processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix, and wherein said line memory means comprises a single line memory, and wherein said processing means includes a camera process circuit receiving block data with N rows and M columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting an aperture correction on the luminance block data.

Claim 7

A digital video camera according to claim 4, wherein said processing means further includes block buffer means connected to said camera process circuit for storing the luminance block data every block, and a multiplexer connected to said processing means for interleaving transfers of the luminance block data from said block buffer means to an output of said processing means.

Claim 8

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix; and controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory means and a reading out process of the plurality of data by said processing means, and wherein said line memory means comprises two line memories each storing a plurality of digitized raster scanning data and a switch circuit connected to said two line memories for connecting said two line memories for connecting said two line memories with said processing means alternately, and wherein said processing means includes a camera process circuit receiving block data with N rows and m columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting in aperture correction on the luminance block data.

Claim 9

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix; and controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory means and a reading out process of the plurality of data by said processing means, and wherein said line memory means comprises two line memories each storing a plurality of digitized raster scanning data and a switch circuit connected to said two line memories for connecting said two line memories for connecting said two line memories with said processing means alternately, and wherein said processing means includes a camera process circuit receiving block data with N rows and m columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting in aperture correction on the luminance block data.

Claim 10

A digital video camera according to claim 6, wherein said controlling means comprises an address controller controlling the reading out process from said line memories by said processing means at twice a frequency of write clock signals in the storing process.

Claim 11

A digital video camera according to claim 6, wherein said processing means further include a shift register connected to said line memories for storing block data with N rows and M1 columns where M1 is smaller than M, and a RAM register connected to said line memories and said shift register for storing block data with N rows and M2 columns where M2 is smaller than M1.

Claim 12

A digital video camera according to claim 8, wherein said processing means further includes block buffer means connected to said camera process circuit for storing the luminance block data every block, and a multiplexer connected to said processing means for interleaving transfers of the luminance block data from said block buffer means to an output of said processing means.

Claim 13

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix; and controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory means and a reading out process of the plurality of data by said processing means, and wherein said line memory means comprises a single line memory, and wherein said processing means includes a camera process circuit receiving block data with N rows and M columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting in aperture correction on the luminance block data.

Claim 14

A digital video camera including an image sensor, comprising: line memory means for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory means and converting the data into luminance data every block or matrix; and controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory means and a reading out process of the plurality of data by said processing means, and wherein said line memory means comprises a single line memory, and wherein said processing means includes a camera process circuit receiving block data with N rows and M columns and converting the block data into luminance block data with L rows and L columns, and an aperture correction circuit connected to said camera process circuit for putting in aperture correction on the luminance block data.

Claim 15

A digital video camera according to claim 10, wherein said controlling means comprises an address controller controlling the reading out process from said line memories by said processing means at twice a frequency of write clock signals in the storing process.

Claim 16

A digital video camera according to claim 11, wherein said processing means further includes block buffer means connected to said camera process circuit for storing the luminance block data every block, and a multiplexer connected to said processing means for interleaving transfers of the luminance block data from said block buffer means to an output of said processing means.

Claim 17

A digital video camera including an image sensor, comprising: a single line memory for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory and converting the data into luminance data every block or matrix; controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory and a reading out process of the plurality of data by said processing means; compressing means for compressing the luminance data transferred from said processing means; recording means for recording said compressed luminance block data; and reproducing means for reading out said recorded luminance block data from said recording means and reproducing video analog signals from these data.

Claim 18

A digital video camera including an image sensor, comprising: a single line memory for storing a plurality of digitized raster scanning data transferred from the image sensor; processing means for reading out a plurality of data in the form of block or matrix from said line memory and converting the data into luminance data every block or matrix; controlling means for controlling a timing of a storing process of the plurality of digitized raster scanning data in said line memory and a reading out process of the plurality of data by said processing means; compressing means for compressing the luminance data transferred from said processing means; recording means for recording said compressed luminance block data; and reproducing means for reading out said recorded luminance block data from said recording means and reproducing video analog signals from these data.

Claim 19

A digital video camera according to claim 13, wherein said reproducing means comprises an aperture correction circuit for putting in aperture correction on said recorded luminance block data.